MPC8315E-RDBA Freescale, MPC8315E-RDBA Datasheet - Page 49

• Manufacturer Part Number: MPC8315E-RDBA
• Manufacturer: Freescale

Specifications of MPC8315E-RDBA

• Lead Free Status / RoHS Status: Compliant

13.2
Table 48
Freescale Semiconductor
At recommended operating conditions with NVDD of 3.3 V ± 300 mv
All values refer to V
Input current (0 V ≤V
Notes:
1. Output voltage (open drain or open collector) condition = 3 mA sink current.
2. C
3. See the MPC8315E PowerQUICC II Pro Integrated Host Processor Reference Manual for information on the digital filter
4. I/O pins obstruct the SDA and SCL lines if NVDD is switched off.
SCL clock frequency
Low period of the SCL clock
High period of the SCL clock
Setup time for a repeated START condition
Hold time (repeated) START condition (after this period, the first clock pulse is
generated)
Data setup time
Data hold time:
Fall time of both SDA and SCL signals
Setup time for STOP condition
Bus free time between a STOP and START condition
Noise margin at the LOW level for each connected device (including hysteresis)
used.
B
= capacitance of one bus line in pF.
provides the AC timing parameters for the I
I
2
C AC Electrical Specifications
IH
(min) and V
IN
MPC8315E PowerQUICC
≤ NVDD)
Parameter
IL
Table 47. I
(max) levels (see
Parameter
Table 48. I
2
C DC Electrical Characteristics (continued)
Table
™
2
II Pro Processor Hardware Specifications, Rev. 0
C AC Electrical Specifications
47)
CBUS compatible masters
2
I
2
C interface.
Symbol
C bus devices
I
IN
Symbol
Min
t
—
t
t
t
t
t
t
I2PVKH
I2SVKH
I2DVKH
I2KHDX
I2SXKL
I2DXKL
I2CF
t
t
V
f
I2CH
I2CL
I2C
NL
4
1
0.1 × NVDD
Max
Min
100
1.3
0.6
0.6
0.6
0.6
1.3
± 5
0
—
—
0
2
0.9
Max
400
300
Unit
—
—
—
—
—
—
—
—
—
μA
3
Notes
Unit
kHz
μs
μs
μs
μs
ns
μs
ns
μs
μs
4
V
I
49
2
C