MPC8315E-RDBA Freescale, MPC8315E-RDBA Datasheet - Page 60

• Manufacturer Part Number: MPC8315E-RDBA
• Manufacturer: Freescale

Specifications of MPC8315E-RDBA

• Lead Free Status / RoHS Status: Compliant

High-Speed Serial Interfaces (HSSI)
Figure 46
It assumes the DC levels of the clock driver are compatible with MPC8315E SerDes reference clock
input’s DC requirement.
15.2.4
The clock driver selected should provide a high quality reference clock with low phase noise and
cycle-to-cycle jitter. Phase noise less than 100KHz can be tracked by the PLL and data recovery loops and
is less of a problem. Phase noise above 15MHz is filtered by the PLL. The most problematic phase noise
occurs in the 1-15MHz range. The source impedance of the clock driver should be 50 Ω to match the
transmission line and reduce reflections which are a source of noise to the system.
60
Single-Ended
CLK Driver Chip
Clock Driver
LVPECL CLK
Driver Chip
Clock Driver
Clock Driver
Figure 45. AC-Coupled Differential Connection with LVPECL Clock Driver (Reference Only)
shows the SerDes reference clock connection reference circuits for a single-ended clock driver.
AC Requirements for SerDes Reference Clocks
CLK_Out
CLK_Out
CLK_Out
MPC8315E PowerQUICC
Figure 46. Single-Ended Connection (Reference Only)
33 Ω
R1
R1
100 Ω differential PWB trace
Total 50 Ω. Assume clock driver’s
output impedance is about 16 Ω.
R2
R2
50
100 Ω differential PWB trace
Ω
™
II Pro Processor Hardware Specifications, Rev. 0
10 nF
10 nF
SD_REF_CLK
SD_REF_CLK
SD_REF_CLK
SD_REF_CLK
50 Ω
50 Ω
50 Ω
50 Ω
MPC8315E
Freescale Semiconductor
MPC8315E
SerDes Refer.
CLK Receiver
SerDes Refer.
CLK Receiver