A000048 Arduino, A000048 Datasheet - Page 143

• Manufacturer Part Number: A000048
• Description: ATMEGA328 MCU IC W/ Arduino UNO Bootloader
• Manufacturer: Arduino
• Series: -r

Specifications of A000048

• Accessory Type: Pre-Programed IC
• Features: Powered Via USB Connection, AC-to-DC Adapter, Power Jack, ICSP Header
• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: -
• For Use With: ATmega328 Microcontrollers
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Enabling and disabling of the clock input must be done when T1/T0 has been stable for at least
one system clock cycle, otherwise it is a risk that a false Timer/Counter clock pulse is generated.
Each half period of the external clock applied must be longer than one system clock cycle to
ensure correct sampling. The external clock must be guaranteed to have less than half the sys-
tem clock frequency (f
< f
/2) given a 50/50% duty cycle. Since the edge detector uses
ExtClk
clk_I/O
sampling, the maximum frequency of an external clock it can detect is half the sampling fre-
quency (Nyquist sampling theorem). However, due to variation of the system clock frequency
and duty cycle caused by Oscillator source (crystal, resonator, and capacitors) tolerances, it is
recommended that maximum frequency of an external clock source is less than f
/2.5.
clk_I/O
An external clock source can not be prescaled.
(1)
Figure 16-2. Prescaler for Timer/Counter0 and Timer/Counter1
clk
I/O
Clear
PSRSYNC
T0
Synchronization
T1
Synchronization
clk
clk
T1
T0
T1/T0)
Note:
1. The synchronization logic on the input pins (
is shown in
Figure
16-1.
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