A000048 Arduino, A000048 Datasheet - Page 15
A000048
Manufacturer Part Number
A000048
Description
ATMEGA328 MCU IC W/ Arduino UNO Bootloader
Manufacturer
Arduino
Series
-r
Specifications of A000048
Accessory Type
Pre-Programed IC
Features
Powered Via USB Connection, AC-to-DC Adapter, Power Jack, ICSP Header
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
-
For Use With
ATmega328 Microcontrollers
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 15 of 566
- Download datasheet (23Mb)
6.7.1
8271C–AVR–08/10
Interrupt Response Time
When using the SEI instruction to enable interrupts, the instruction following SEI will be exe-
cuted before any pending interrupts, as shown in this example.
The interrupt execution response for all the enabled AVR interrupts is four clock cycles mini-
mum. After four clock cycles the program vector address for the actual interrupt handling routine
is executed. During this four clock cycle period, the Program Counter is pushed onto the Stack.
The vector is normally a jump to the interrupt routine, and this jump takes three clock cycles. If
an interrupt occurs during execution of a multi-cycle instruction, this instruction is completed
before the interrupt is served. If an interrupt occurs when the MCU is in sleep mode, the interrupt
execution response time is increased by four clock cycles. This increase comes in addition to the
start-up time from the selected sleep mode.
A return from an interrupt handling routine takes four clock cycles. During these four clock
cycles, the Program Counter (two bytes) is popped back from the Stack, the Stack Pointer is
incremented by two, and the I-bit in SREG is set.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Assembly Code Example
C Code Example
Assembly Code Example
C Code Example
in r16, SREG
cli
sbi EECR, EEMPE
sbi EECR, EEPE
out SREG, r16
char cSREG;
cSREG = SREG; /* store SREG value */
/* disable interrupts during timed sequence */
_CLI();
EECR |= (1<<EEMPE); /* start EEPROM write */
EECR |= (1<<EEPE);
SREG = cSREG; /* restore SREG value (I-bit) */
sei
sleep; enter sleep, waiting for interrupt
; note: will enter sleep before any pending interrupt(s)
__enable_interrupt(); /* set Global Interrupt Enable */
__sleep(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */
; set Global Interrupt Enable
; disable interrupts during timed sequence
; store SREG value
; start EEPROM write
; restore SREG value (I-bit)
15
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