CS1D-BC042D Omron, CS1D-BC042D Datasheet - Page 226

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CS1D-BC042D

Manufacturer Part Number
CS1D-BC042D
Description
CS1D Dual CPU Exp
Manufacturer
Omron
Datasheet

Specifications of CS1D-BC042D

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
6-1-3
6-2
6-2-1
Startup Hold Settings
Forced Status Hold Bit
Specific PLC Setup Settings
80
Word
Programming
Address in
Console
Specific PLC Setup Settings
Startup Tab Page
14
Tab Pages for Duplex Settings in the PLC Setup
Bit(s)
0: Cleared
1: Retained
Default: 0
Settings
The location of duplex settings and the tab labels in CX-Programmer are dif-
ferent between version 3.@ and version 4.0 or higher.
The CX-Programmer version 4.0 tab labels are used in this manual.
The Programming Console addresses given in this section are used to access
and change settings in the PLC Setup when using a Programming Console or
the Programming Console function of an NS-series Programming Terminal.
The PLC Setup is stored in the Parameter Area, which can be accessed only
from a Programming Device. Do not use the Programming Console
addresses as operands in programming instructions. They will be interpreted
as addresses in the CIO Area of I/O memory.
CPU Unit duplex settings
Communications duplex
settings
Settings
This setting determines whether or not the
status of the Forced Status Hold Bit
(A50013) is retained at startup.
When you want all of the bits that have been
force-set or force-reset to retain their forced
status when the power is turned on, turn ON
the Forced Status Hold Bit and set this set-
ting to 1 (ON).
Function
Duplex Tab Page
CX-Programmer Ver. 3.@
A50013
(Forced Sta-
tus Hold Bit)
flags and
Comms Unit Duplex Tab
Page
CPU Duplex Tab Page
CX-Programmer Ver. 4.0
Related
words
or higher
Section 6-2
At startup
ting’s effec-
New set-
tiveness
191

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