ADE7569ASTZF16-RL Analog Devices Inc, ADE7569ASTZF16-RL Datasheet - Page 66

• Manufacturer Part Number: ADE7569ASTZF16-RL
• Description: IC,Power Metering,QFP,64PIN,PLASTIC
• Manufacturer: Analog Devices Inc

Specifications of ADE7569ASTZF16-RL

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (16 kB)
• Controller Series: ADE75xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7566/ADE7569
Table 46. Temperature and Supply Delta SFR (DIFFPROG, 0xF3)
Bit No.
7 to 6
5 to 3
2 to 0
Table 47. Start ADC Measurement SFR (ADCGO, 0xD8)
Bit No.
7
6 to 3
2
1
0
Table 48. Battery Detection Threshold SFR (BATVTH, 0xFA)
Bit No.
7 to 0
Table 49. VDCIN ADC Value SFR (VDCINADC, 0xEF)
Bit No.
7 to 0
Table 50. Battery ADC Value SFR (BATADC, 0xDF)
Bit No.
7 to 0
Table 51. Temperature ADC Value SFR (TEMPADC, 0xD7)
Bit No.
7 to 0
Mnemonic
Reserved
TEMP_DIFF[2:0]
VDCIN_DIFF[2:0]
Address
0xDF
0xDE to 0xDB
0xDA
0xD9
0xD8
Mnemonic
BATVTH
Mnemonic
VDCINADC
Mnemonic
BATADC
Mnemonic
TEMPADC
Mnemonic
PLLACK
Reserved
VDCIN_ADC_GO
TEMP_ADC_GO
BATT_ADC_GO
Default
0
Default
0
Default
0
0
0
Default
0
Default
0
Description
Reserved.
Difference threshold between last temperature measurement interrupting 8052 and new
temperature measurement that should interrupt 8052.
TEMP_DIFF[2:0]
000
001
010
011
100
101
110
111
Difference threshold between last external voltage measurement interrupting 8052 and new
external measurement that should interrupt 8052.
VDCIN_DIFF[2:0]
000
001
010
011
100
101
110
111
Description
The battery ADC value is compared to this register, the battery threshold register. If BATADC is
lower than the threshold, an interrupt is generated.
Description
The V
Description
The battery ADC value in this register is updated when an ADC interrupt occurs.
Description
The temperature ADC value in this register is updated when an ADC interrupt occurs.
Default
0
0
0
0
0
DCIN
ADC value in this register is updated when an ADC interrupt occurs.
Description
Set this bit to clear the PLL fault bit, PLL_FLT, in the PERIPH register. A PLL fault is
generated if a reset was caused because the PLL lost lock.
Reserved.
Set this bit to initiate an external voltage measurement. This bit is cleared when
the measurement request is received by the ADC.
Set this bit to initiate a temperature measurement. This bit is cleared when the
measurement request is received by the ADC.
Set this bit to initiate a battery measurement. This bit is cleared when the
measurement request is received by the ADC.
Rev. PrA | Page 66 of 136
Result
No interrupt
1 LSB (≈ 0.8°C)
2 LSB (≈ 1.6°C)
3 LSB (≈ 2.4°C)
4 LSB (≈ 3.2°C)
5 LSB (≈ 4°C)
6 LSB (≈ 4.8°C)
Every temperature measurement
Result
No interrupt
1 LSB (≈ 120 mV)
2 LSB (≈ 240 mV)
3 LSB (≈ 360 mV)
4 LSB (≈ 480 mV)
5 LSB (≈ 600 mV)
6 LSB (≈ 720 mV)
Every V
DCIN
measurement
Preliminary Technical Data