ADE7518ASTZF16-RL Analog Devices Inc, ADE7518ASTZF16-RL Datasheet - Page 58
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ADE7518ASTZF16-RL
Manufacturer Part Number
ADE7518ASTZF16-RL
Description
1-Phase Energy Meter IC
Manufacturer
Analog Devices Inc
Datasheet
1.ADE7518ASTZF16.pdf
(128 pages)
Specifications of ADE7518ASTZF16-RL
Applications
Energy Measurement
Core Processor
8052
Program Memory Type
FLASH (16 kB)
Controller Series
ADE75xx
Ram Size
512 x 8
Interface
I²C, SPI, UART
Number Of I /o
20
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADE7518ASTZF16-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADE7518
APPARENT POWER CALCULATION
Apparent power is defined as the maximum power that can be
delivered to a load. V
current delivered to the load, respectively. Therefore, the apparent
power (AP) = V
phase angle between the current and the voltage.
Equation 29 gives an expression of the instantaneous power
signal in an ac system with a phase shift.
Figure 62 illustrates the signal processing for the calculation of
the apparent power in the ADE7518.
The apparent power signal can be read from the waveform register
by setting the WAVMODE register (0x0D) and setting the WFSM
bit in the Interrupt Enable 3 SFR (MIRQENH, 0xDB). Like the
current and voltage channel waveform sampling modes, the
waveform data is available at a sample rate of 25.6 kSPS, 12.8 kSPS,
6.4 kSPS, or 3.2 kSPS.
v t
t i
p
p
( )
( )
( )
(
t
t
)
=
=
=
=
V
v
2
2
(
rms
t
V
I
)
rms
rms
I
rms
×
rms
t i
× I
sin(
sin( )
(
cos(
)
rms
rms
ω
ω
. This equation is independent from the
and I
t
θ
t
)
+
−
θ
V
)
rms
rms
are the effective voltage and
V
I
I
rms
rms
rms
cos(
CURRENT RMS SIGNAL – i(t)
VOLTAGE RMS SIGNAL – v(t)
0x1CF68C
0x1CF68C
2
0x00
0x00
ω
t
+
θ
)
Figure 62. Apparent Power Signal Processing
Rev. 0 | Page 58 of 128
(26)
(27)
(28)
(29)
VARMSCFCON
The gain of the apparent energy can be adjusted by using the
multiplier and by writing a twos complement, 12-bit word to the
VAGAIN register (VAGAIN[11:0]). Equation 30 shows how the
gain adjustment is related to the contents of the VAGAIN register.
For example, when 0x7FF is written to the VAGAIN register, the
power output is scaled up by 50% (0x7FF = 2047d, 2047/2
Similarly, 0x800 = –2047d (signed twos complement) and power
output is scaled by –50%. Each LSB represents 0.0244% of the
power output. The apparent power is calculated with the current
and voltage rms values obtained in the rms blocks of the ADE7518.
Apparent Power Offset Calibration
Each rms measurement includes an offset compensation register to
calibrate and eliminate the dc component in the rms value (see the
Current Channel RMS Calculation section and the Voltage
Channel RMS Calculation section). The voltage and current
channels rms values are then multiplied together in the appar-
ent power signal processing. Because no additional offsets are
created in the multiplication of the rms values, there is no
specific offset compensation in the apparent power signal
processing. The offset compensation of the apparent power
measurement is done by calibrating each individual rms
measurement.
VAGAIN
Output VAGAIN =
⎛
⎜
⎝
Apparent
DIGITAL-TO-FREQUENCY
0x1A36E2
APPARENT POWER
SIGNAL (P)
CONVERTER
Power
TO
×
⎧ +
⎨
⎩
1
VAGAIN
2
12
⎫
⎬
⎭
⎞
⎟
⎠
12
= 0.5).
(30)