ADE7518ASTZF16-RL Analog Devices Inc, ADE7518ASTZF16-RL Datasheet - Page 36

1-Phase Energy Meter IC

ADE7518ASTZF16-RL

Manufacturer Part Number
ADE7518ASTZF16-RL
Description
1-Phase Energy Meter IC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADE7518ASTZF16-RL

Applications
Energy Measurement
Core Processor
8052
Program Memory Type
FLASH (16 kB)
Controller Series
ADE75xx
Ram Size
512 x 8
Interface
I²C, SPI, UART
Number Of I /o
20
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADE7518ASTZF16-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADE7518
Address
MADDPT[6:0]
0x29
0x2A
0x3B
0x3C
0x3D
0x3E
0x3F
ENERGY MEASUREMENT INTERNAL REGISTERS DETAILS
Table 31. MODE1 Register (0x0B)
Bit
7
6
5
4
3
2
1
0
Table 32. MODE2 Register (0x0C)
Bit
7 to 6
5 to 4
3
2
1
0
Mnemonic
CF2NUM
CF2DEN
Reserved
Reserved
Reserved
Reserved
Reserved
Mnemonic
SWRST
DISZXLPF
Reserved
SWAPBITS
PWRDN
DISCF2
DISCF1
DISHPF
Mnemonic
CF2SEL[1:0]
CF1SEL[1:0]
VARMSCFCON
ZXRMS
FREQSEL
WAVEN
R/W
R/W
R/W
Default
0
0
0
0
0
1
1
0
Default
01
00
0
0
0
Length
(Bits)
16
16
Signed/
Unsigned
U
U
Description
Configuration Bits for CF2 Output.
CF2SEL[1:0]
00
01
1x
Configuration Bits for CF1 Output.
CF1SEL[1:0]
00
01
1x
Configuration Bits for Apparent Power or I
Registers (VAHR, RVAHR, and LVAHR). Note that CF1 cannot be proportional to VA if CF2 is
proportional to I
VARMSCFCON
0
1
Logic 1 enables update of rms values synchronously to Voltage ZX.
Configuration Bits to Select Period or Frequency Measurement for PER_FREQ Register (0x0A).
FREQSEL
0
1
When this bit is set, the waveform sampling mode is enabled.
Description
Setting this bit resets all of the energy measurement registers to their default values.
Setting this bit disables the zero-crossing low-pass filter.
This bit must be kept at its default value for proper operation.
Setting this bit swaps CH1 ADC and CH2 ADC.
Setting this bit powers down voltage and current ADCs.
Setting this bit disables Frequency Output CF2.
Setting this bit disables Frequency Output CF1.
Setting this bit disables the HPFs in voltage and current channels.
Rev. 0 | Page 36 of 128
Default
0
0x003F
0
0x0300
0
0
0
rms
Result
CF2 frequency is proportional to active power.
CF2 frequency is proportional to reactive power.
CF2 frequency is proportional to apparent power or I
Result
CF1 frequency is proportional to active power.
CF1 frequency is proportional to reactive power.
CF1 frequency is proportional to apparent power or I
and vice versa.
Result
If CF1SEL[1:0] = 1x, CF1 is proportional to VA.
If CF2SEL[1:0] = 1x, CF2 is proportional to VA.
If CF1SEL[1:0] = 1x, CF1 is proportional to I
If CF2SEL[1:0] = 1x, CF2 is proportional to I
Result
PER_FREQ register holds a period measurement.
PER_FREQ register holds a frequency measurement.
Description
Sets CF2 numerator register.
Sets CF2 denominator register.
This register must be kept at its default value for proper operation.
This register must be kept at its default value for proper operation.
This register must be kept at its default value for proper operation.
This register must be kept at its default value for proper operation.
This register must be kept at its default value for proper operation.
rms
for CF1, CF2 Outputs, and VA Accumulation
rms
rms
.
.
rms
rms
.
.

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