ADE7518ASTZF16-RL Analog Devices Inc, ADE7518ASTZF16-RL Datasheet - Page 102

1-Phase Energy Meter IC

ADE7518ASTZF16-RL

Manufacturer Part Number
ADE7518ASTZF16-RL
Description
1-Phase Energy Meter IC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADE7518ASTZF16-RL

Applications
Energy Measurement
Core Processor
8052
Program Memory Type
FLASH (16 kB)
Controller Series
ADE75xx
Ram Size
512 x 8
Interface
I²C, SPI, UART
Number Of I /o
20
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
ADE7518ASTZF16-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADE7518
Table 114. Alarm Interval SFR (INTVAL, 0xA6)
Bit
7 to 0
Table 115. RTC Nominal Compensation SFR (RTCCOMP, 0xF6)
Bit
7 to 0
Table 116. RTC Temperature Compensation SFR (TEMPCAL, 0xF7)
Bit
7 to 0
Table 117. Interrupt Pins Configuration SFR (INTPR, 0xFF)
Bit
7
6 to 5
4
3 to 1
0
Table 118. Key SFR (KYREG, 0xC1)
Bit
7 to 0
Mnemonic
KYREG
Mnemonic
INTVAL
Mnemonic
RTCCAL
FSEL[1:0]
Reserved
INT1PRG[2:0]
INT0PRG
Mnemonic
Mnemonic
RTCCOMP
TEMPCAL
Default
0
Default
0
Default
0
Default
0
Default
0
00
0
000
0
Description
The TEMPCAL SFR is adjusted based on a temperature read. This allows the external crystal shift to be
compensated over temperature. This register is retained during a watchdog reset or an external reset.
It is reset after a POR.
Controls the RTC calibration output. When set, the RTC calibration frequency selected by FSEL[1:0] is
output on the P0.2/CF1/RTCCAL pin.
Sets RTC calibration output frequency and calibration window.
FSEL[1:0]
00
01
10
11
This bit must be set to 0 for proper operation.
Controls the function of INT1.
INT1PRG[2:0]
x00
x01
01x
11x
Controls the function of INT0.
INT0PRG
0
1
Description
Write 0xA7 to this SFR before writing to the POWCON SFR, which unlocks KYREG.
Write 0xEA to this SFR before writing to the INTPR, HTHSEC, SEC, MIN, or HOUR timekeeping registers
to unlock KYREG.
Description
The interval timer counts according to the time base established in the ITS[1:0] bits of the RTC Configuration
SFR (TIMECON, 0xA1). Once the number of counts is equal to INTVAL, the ALARM flag is set and a
pending RTC interrupt is created. Note that the interval counter is eight bits. Therefore, it can count up to
255 seconds, for example.
Description
The RTCCOMP SFR holds the nominal RTC compensation value at 25°C. This register is retained during
a watchdog reset or an external reset. It is reset after a POR.
Description
Rev. 0 | Page 102 of 128
Result (Calibration Window, Frequency)
30.5 sec, 1 Hz
30.5 sec, 512 Hz
0.244 sec, 500 Hz
0.244 sec, 16.384 kHz
Result
GPIO
BCTRL
INT1 input disabled
INT1 input enabled
Result
INT0 input disabled
INT0 input enabled

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