ADE7518ASTZF16-RL Analog Devices Inc, ADE7518ASTZF16-RL Datasheet - Page 55
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ADE7518ASTZF16-RL
Manufacturer Part Number
ADE7518ASTZF16-RL
Description
1-Phase Energy Meter IC
Manufacturer
Analog Devices Inc
Datasheet
1.ADE7518ASTZF16.pdf
(128 pages)
Specifications of ADE7518ASTZF16-RL
Applications
Energy Measurement
Core Processor
8052
Program Memory Type
FLASH (16 kB)
Controller Series
ADE75xx
Ram Size
512 x 8
Interface
I²C, SPI, UART
Number Of I /o
20
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADE7518ASTZF16-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
When SAVARM in the ACCMODE register (0x0F) is set, the
reactive power is accumulated depending on the sign of the
active power. When active power is positive, the reactive power
is added as it is to the reactive energy register. When active
power is negative, the reactive power is subtracted from the
reactive energy accumulator (see the VAR Antitamper
Accumulation Mode section).
When ABSVARM in the ACCMODE register (0x0F) is set, the
absolute reactive power is used for the reactive energy accumu-
lation (see the VAR Absolute Accumulation Mode section).
The output of the multiplier is divided by VARDIV. If the value
in the VARDIV register is equal to 0, the internal reactive
energy register is divided by 1. VARDIV is an 8-bit, unsigned
register. After dividing by VARDIV, the reactive energy is
accumulated in a 49-bit internal energy accumulation register.
The upper 24 bits of this register are accessible through a read
to the reactive energy register (VARHR[23:0]). A read to the
RVARHR register returns the content of the VARHR register,
and the upper 24 bits of the internal register are cleared.
CURRENT
CHANNEL
VOLTAGE
CHANNEL
HPF
PHCAL[7:0]
SHIFTING FILTER
90° PHASE
Π
2
T
REACTIVE POWER
LPF2
MCLK
sgn
SIGNAL
5
TIME (nT)
VAROS[15:0]
2
6
2
+
Figure 58. Reactive Energy Calculation
5
+
2
WAVEFORM
REGISTER
–6
VALUES
Rev. 0 | Page 55 of 128
2
–7
FOR WAVEFORM
2
–8
SAMPLING
VARGAIN[11:0]
As shown in Figure 58, the reactive power signal is accumulated
in an internal 49-bit signed register. The reactive power signal
can be read from the waveform register by setting the WAVMODE
register (0x0D) and setting the WFSM bit in the Interrupt Enable 3
SFR (MIRQENH, 0xDB). Like the current and voltage channel
waveform sampling modes, the waveform data is available at a
sample rate of 25.6 kSPS, 12.8 kSPS, 6.4 kSPS, or 3.2 kSPS.
Figure 53 shows this energy accumulation for full-scale signals
(sinusoidal) on the analog inputs. These curves also apply for
the reactive energy accumulation.
Note that the energy register contents roll over to full-scale
negative (0x800000) and continue to increase in value when
the power or energy flow is positive. Conversely, if the power is
negative, the reactive energy register underflows to full-scale
positive (0x7FFFFF) and continues to decrease in value.
By using the interrupt enable register, the ADE7518 can be
configured to issue an ADE interrupt to the 8052 core when the
reactive energy register is half full (positive or negative) or
when an overflow or underflow occurs.
DIGITAL-TO-FREQUENCY
VARDIV[7:0]
CONVERTER
%
TO
+
+
48
23
V ARHR[23:0 ]
OUTPUTS FROM THE LPF2 ARE
ACCUMULATED (INTEGRATED) IN
THE INTERNAL REACTIVE ENERGY
REGISTER
0
UPPER 24 BITS ARE
ACCESSIBLE THROUGH
VARHR[23:0] REGISTER
ADE7518
0