ADE7518ASTZF16-RL Analog Devices Inc, ADE7518ASTZF16-RL Datasheet - Page 23

• Manufacturer Part Number: ADE7518ASTZF16-RL
• Description: 1-Phase Energy Meter IC
• Manufacturer: Analog Devices Inc

Specifications of ADE7518ASTZF16-RL

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (16 kB)
• Controller Series: ADE75xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 16. Power Management Interrupt Flag SFR (IPSMF, 0xF8)
Bit
7
6
5
4
3
2
1
0
Table 17. Battery Switchover Configuration SFR (BATPR, 0xF5)
Bit
7 to 2
1 to 0
Table 18. Peripheral Configuration SFR (PERIPH, 0xF4)
Bit
7
6
5
4
3
2
1 to 0
Table 19. Power Management Interrupt Enable SFR (IPSME, 0xEC)
Bit
7
6
5
4 to 2
1
0
Table 20. Scratch Pad 1 SFR (SCRATCH1, 0xFB)
Bit
7 to 0
Mnemonic
RXFLAG
VSWSOURCE
VDD_OK
PLL_FLT
Reserved
Reserved
RXPROG[1:0]
Mnemonic
EPSR
Reserved
ESAG
Reserved
EBSO
EVDCIN
Mnemonic
Reserved
BATPRG[1:0]
Mnemonic
SCRATCH1
Address
0xFF
0xFE
0xFD
0xFC
0xFB
0xFA
0xF9
0xF8
Mnemonic
FPSR
FPSM
FSAG
Reserved
Reserved
Reserved
FBSO
FVDCIN
Default
0
Default
0
1
1
0
0
0
00
Default
0
0
0
0
0
0
Default
0
00
Default
0
0
0
0
0
0
0
0
Description
These bits must be kept to 0 for proper operation.
Control Bits for Battery Switchover.
BATPRG[1:0]
00
01
1x
Description
If set, indicates that an Rx edge event triggered wake-up from PSM2.
Indicates the power supply that is internally connected to V
If set, indicates that the V
If set, indicates that a PLL fault occurred where the PLL lost lock. Set the PLL_FTL_ACK bit (see
Table 107) in the Start ADC Measurement SFR (ADCGO, 0xD8) to acknowledge the fault and clear
the PLL_FLT bit.
This bit should be kept to 0.
This bit should be kept to 0.
Controls the function of the P1.0/RxD pin.
RXPROG[1:0]
00
01
11
Description
Enables a PSM interrupt when the power supply restored flag (FPSR) is set.
Reserved.
Enables a PSM interrupt when the voltage SAG flag (FSAG) is set.
These bits must be kept cleared for proper operation.
Enables a PSM interrupt when the battery switchover flag (FBSO) is set.
Enables a PSM interrupt when the V
Description
Value can be written/read in this register. This value is maintained in all the power saving modes.
Description
Power Supply Restored Interrupt Flag. Set when the V
This occurs when the source of V
PSM Interrupt Flag. Set when an enabled PSM interrupt condition occurs.
Voltage SAG Interrupt Flag. Set when an ADE energy measurement SAG condition occurs.
This bit must be kept cleared for proper operation.
This bit must be kept cleared for proper operation.
This bit must be kept cleared for proper operation.
Battery Switchover Interrupt Flag. Set when V
V
DCIN
Monitor Interrupt Flag. Set when V
Result
Battery switchover enabled on low V
Battery switchover enabled on low V
Battery switchover disabled
Result
GPIO
RxD with wake-up disabled
RxD with wake-up enabled
Rev. 0 | Page 23 of 128
DD
power supply is ready for operation.
DCIN
monitor flag (FVDCIN) is set.
SWOUT
changes from V
DCIN
DD
DD
falls below 1.2 V.
and low V
SWOUT
SWOUT
switches from V
BAT
DD
(0 V
DCIN
power supply has been restored.
to V
SWOUT
DD
.
= V
BAT
DD
, 1 V
to V
SWOUT
BAT.
ADE7518
= V
DD
).