MEDIA5200KIT1 Freescale Semiconductor, MEDIA5200KIT1 Datasheet - Page 56
![MCU, MPU & DSP Development Tools MEDIA5200 SW DEVT SYSTEM](/photos/26/94/269448/media5200_photo_sml.jpg)
MEDIA5200KIT1
Manufacturer Part Number
MEDIA5200KIT1
Description
MCU, MPU & DSP Development Tools MEDIA5200 SW DEVT SYSTEM
Manufacturer
Freescale Semiconductor
Specifications of MEDIA5200KIT1
Processor To Be Evaluated
MPC5200B
Data Bus Width
32 bit
Interface Type
Ethernet, USB
Lead Free Status / Rohs Status
Not Compliant
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1.3.18
56
1
2
3
TRST is an asynchronous signal. The setup time is for test purposes only.
Non-test, other than TDI and TMS, signal input timing with respect to TCK.
Non-test, other than TDO, signal output timing with respect to TCK.
Sym
TRST
10
11
12
13
—
1
2
3
4
5
6
7
8
9
TCK
TCK
IEEE 1149.1 (JTAG) AC Specifications
TCK clock pulse width measured at 1.5V.
TRST setup time to tck falling edge
TCK to output high impedance
TCK to TDO high impedance.
TCK frequency of operation.
3
TCK to output data valid
TMS, TDI data setup time.
TMS, TDI data hold time.
Input data setup time
TCK rise and fall times.
TCK to TDO data valid.
Figure 46. Timing Diagram—JTAG Clock Input
Input data hold time
TRST assert time.
TCK cycle time.
Figure 47. Timing Diagram—JTAG TRST
Characteristic
Table 51. JTAG Timing Specification
MPC5200B Data Sheet, Rev. 4
VM
5
(2)
(2)
.
3
(3)
.
.
(3)
2
4
.
(1)
.
VM = Midpoint Voltage
Numbers shown reference
1
Numbers shown reference
VM
1.08
Min
40
10
15
0
0
5
5
0
0
5
1
0
0
2
Max
25
30
30
—
15
15
—
—
—
—
—
—
—
3
Table
VM
Freescale Semiconductor
51.
Table
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
51.
SpecID
A17.10
A17.11
A17.12
A17.13
A17.14
A17.1
A17.2
A17.3
A17.4
A17.5
A17.6
A17.7
A17.8
A17.9
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