P0071 Terasic Technologies Inc, P0071 Datasheet - Page 64
![no-image](/images/manufacturer_photos/0/6/659/terasic_technologies_inc_sml.jpg)
P0071
Manufacturer Part Number
P0071
Description
TPAD MULTIMEDIADEVELOPMENT KIT
Manufacturer
Terasic Technologies Inc
Series
tPAD, Cyclone®IVr
Specifications of P0071
Main Purpose
Reference Design, Tablet
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
EP4CE115
Primary Attributes
8-Inch TFT LCD, LED Backlight
Secondary Attributes
5-Megapixel Digital Image Sensor
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4
SRAM
The DE2-115 board has 2MB SRAM memory with 16-bit data width. Being featured with a
maximum performance frequency of about 125MHz under the condition of standard 3.3V single
power supply makes it suitable of dealing with high-speed media processing applications that need
ultra data throughput. The related schematic is shown in
SDRAM
The board features 128MB of SDRAM, implemented using two 64MB SDRAM devices. Each
device consists of separate 16-bit data lines connected to the FPGA, and shared control and address
lines. These chips use the 3.3V LVCMOS signaling standard. Connections between FPGA and
SDRAM are shown in
Signal Name
IRDA_RXD
4
.
.
1
1
9
9
U
U
s
s
i
i
n
n
g
g
S
S
R
R
FPGA Pin No.
PIN_Y15
Figure
A
Figure 4-33 Connections between FPGA and SRAM
A
M
M
/
/
S
S
4-34.
D
D
Table 4-26 IR Pin Assignments
R
R
A
A
M
M
Description
IR Receiver
/
/
F
F
L
L
A
A
63
S
S
H
H
/
/
E
E
Figure
E
E
P
P
R
R
4-33.
O
O
M
M
I/O Standard
3.3V
/
/
S
S
D
D
C
C
a
a
r
r
d
d
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