P0071 Terasic Technologies Inc, P0071 Datasheet - Page 109
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P0071
Manufacturer Part Number
P0071
Description
TPAD MULTIMEDIADEVELOPMENT KIT
Manufacturer
Terasic Technologies Inc
Series
tPAD, Cyclone®IVr
Specifications of P0071
Main Purpose
Reference Design, Tablet
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
EP4CE115
Primary Attributes
8-Inch TFT LCD, LED Backlight
Secondary Attributes
5-Megapixel Digital Image Sensor
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 6-28 RGMII interface MAC Configuration
In the MAC Options tab (See
Figure
6-29), users should set up proper values for the PHY chip
88E1111. The MDIO Module should be included, as it is used to generate a 2.5MHz MDC clock for
the PHY chip from the controller's source clock(here a 100MHz clock source is expected) to divide
the MAC control register interface clock to produce the MDC clock output on the MDIO interface.
The MAC control register interface clock frequency is 100MHz and the desired MDC clock
frequency is 2.5MHz, so a host clock divisor of 40 should be used.
108
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