P0071 Terasic Technologies Inc, P0071 Datasheet - Page 51
![no-image](/images/manufacturer_photos/0/6/659/terasic_technologies_inc_sml.jpg)
P0071
Manufacturer Part Number
P0071
Description
TPAD MULTIMEDIADEVELOPMENT KIT
Manufacturer
Terasic Technologies Inc
Series
tPAD, Cyclone®IVr
Specifications of P0071
Main Purpose
Reference Design, Tablet
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
EP4CE115
Primary Attributes
8-Inch TFT LCD, LED Backlight
Secondary Attributes
5-Megapixel Digital Image Sensor
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4
The DE2-115 Board provides 14-pin expansion header. The header connects directly to 7 pins of the
Cyclone IV E FPGA, and also provides DC +3.3V (VCC3P3), and six GND pins as shown in
Figure
Table 4-13
GPIO[29]
GPIO[30]
GPIO[31]
GPIO[32]
GPIO[33]
GPIO[34]
GPIO[35]
4
Signal Name
EX_IO[0]
EX_IO[1]
EX_IO[2]
EX_IO[3]
EX_IO[4]
EX_IO[5]
EX_IO[6]
.
.
9
9
U
U
4-20. The voltage level of the I/O pins on the 14-pin expansion header is 3.3V. Finally,
s
s
i
i
n
shows the pin assignments for I/O connections.
n
g
g
Figure 4-20 Connections between FPGA and 14-pin general purpose I/O
1
1
4
4
Table 4-13 Pin Assignments for General Purpose I/Os
-
-
p
PIN_AF26
PIN_AE20
PIN_AG23
PIN_AF20
PIN_AH26
PIN_AH23
PIN_AG26
p
FPGA Pin No.
PIN_J10
PIN_J14
PIN_H13
PIN_H14
PIN_F14
PIN_E10
PIN_D9
i
i
n
n
G
G
e
e
n
n
e
e
r
r
a
a
GPIO Connection DATA[29]
GPIO Connection DATA[30]
GPIO Connection DATA[31]
GPIO Connection DATA[32]
GPIO Connection DATA[33]
GPIO Connection DATA[34]
GPIO Connection DATA[35]
l
l
P
P
Description
Extended IO[0]
Extended IO[1]
Extended IO[2]
Extended IO[3]
Extended IO[4]
Extended IO[5]
Extended IO[6]
u
u
r
r
50
p
p
o
o
s
s
e
e
I
I
/
/
O
O
C
C
o
o
n
n
n
n
e
e
Depending on JP6
Depending on JP6
Depending on JP6
Depending on JP6
Depending on JP6
Depending on JP6
Depending on JP6
c
c
t
t
o
o
r
r
I/O Standard
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
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