IPR-POSPHY4 Altera, IPR-POSPHY4 Datasheet - Page 63

• Manufacturer Part Number: IPR-POSPHY4
• Description: IP CORE Renewal Of IP-POSPHY4
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-POSPHY4

• Software Application: IP CORE, Interface And Protocols, COMMUNICATION
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: POS-PHY Level 4 Interface, Link-Layer/PHY Layer
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 4: Functional Description—Receiver
Error Flagging and Handling
Figure 4–13. Overflow
December 2010 Altera Corporation
err_ry_fifo_oflwN
aN_arxena
aN_arxsop
aN_arxeop
aN_arxdav
aN_rxclk
Missing EOP
Figure 4–11
err_ry_meop signal is asserted, an EOP is forced, the err signal is asserted, and data is
ignored for that port until an EOP is received.
Figure 4–11. Missing EOP Input Timing Diagram
Figure 4–12. Missing EOP Output Timing Diagram
Good Packet
err_ry_meop
aN_atxsop
aN_atxeop
aN_atxena
aN_atxerr
aN_atxtclk
aN_arxsop
aN_arx eop
aN_arxena
aN_arxtclk
aN_arxerr
and
4–23
show that if a SOP is detected during an open packet, the
Interrupted Packet(s)
Packet A
SS
SS
SS
SS
SS
POS-PHY Level 4 MegaCore Function User Guide
Packet B
Good Packet
4–23