IPR-POSPHY4 Altera, IPR-POSPHY4 Datasheet - Page 55
![IP CORE Renewal Of IP-POSPHY4](/photos/24/19/241943/4696146_sml.jpg)
IPR-POSPHY4
Manufacturer Part Number
IPR-POSPHY4
Description
IP CORE Renewal Of IP-POSPHY4
Manufacturer
Altera
Type
MegaCorer
Specifications of IPR-POSPHY4
Software Application
IP CORE, Interface And Protocols, COMMUNICATION
Supported Families
Arria GX, Cyclone, HardCopy, Stratix
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
POS-PHY Level 4 Interface, Link-Layer/PHY Layer
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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Chapter 4: Functional Description—Receiver
Error Flagging and Handling
Table 4–3. SPI-4.2 Protocol Error Handling (Part 2 of 3)
December 2010 Altera Corporation
Reserved control word
Single DIP-4 error
Error
Reserved control words:
■
■
■
■
Reserved control words are identified by the assertion of
the stat_rd_rsv_cw signal, which pulses high for a
single rdint_clk clock cycle when a reserved control
word is detected.The payload following the reserved
control word is not written into any buffer.
As part of the SPI-4.2 protocol control word content, the 4-
bit diagonal interleaved parity (DIP-4) is computed over the
current control word and preceding data. A DIP-4 error
occurs when the DIP-4 calculated over the rdat line does
not match the DIP-4 value in the control word.
Reserved control word 0 (RSV0) = CTL and
DAT[15:12] == 4’b0101
Reserved control word 1 (RSV1) =
CTL and DAT[15:12] == 4’b0011
Extension control (EXT) =
CTL and DAT[15:12] == 4’b0001
End of control word extension (EOE) = CTL and
DAT[15:12] == 4’b0111
Condition
(Note
1),
(2)
POS-PHY Level 4 MegaCore Function User Guide
■
■
■
■
■
Refer to
page
Ignore reserved control words.
Assert the stat_rd_rsv_cw for
notification purposes.
The payload following the
reserved control word is not
written into the FIFO buffer.
Assert err_rd_dip4 for one
clock cycle.
Optionally mark some or all open
packets with an Atlantic error.
(Including packets with DIP-4
error at SOP). The packets have
aN_arxerr asserted (high).
4–17.
“DIP-4 Marking” on
Response
4–15
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