EP9307-CR Cirrus Logic Inc, EP9307-CR Datasheet - Page 4
![IC,MICROPROCESSOR,32-BIT,CMOS,BGA,272PIN,PLASTIC](/photos/12/23/122386/ep9307-cr_sml.jpg)
EP9307-CR
Manufacturer Part Number
EP9307-CR
Description
IC,MICROPROCESSOR,32-BIT,CMOS,BGA,272PIN,PLASTIC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9307-CR
Rohs Compliant
NO
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
272-TFBGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1254
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9307-CR
Manufacturer:
CIRRUSL
Quantity:
5
Part Number:
EP9307-CRZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
EP9307-CRZ/E2
Manufacturer:
CIRRUS
Quantity:
20 000
Company:
Part Number:
EP9307-CRZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
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- Download datasheet (13Mb)
EP93xx User’s Guide
Chapter 3. MaverickCrunch Co-Processor ......................................................... 3-1
Chapter 4. Boot ROM ............................................................................................ 4-1
iv
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
3.2 Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-8
3.3 DSPSC Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4 ARM Co-Processor Instruction Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-14
3.5 Instruction Set for the MaverickCrunch Co-Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-17
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1
4.2 Boot Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-4
2.3.2 AHB-to-APB Bridge .......................................................................................................2-12
2.3.3 APB Slave .....................................................................................................................2-13
2.3.4 Register Definitions .......................................................................................................2-13
2.3.5 Memory Map..................................................................................................................2-16
2.3.6 Internal Register Map ....................................................................................................2-17
3.1.1 Features ..........................................................................................................................3-1
3.1.2 Operational Overview ......................................................................................................3-1
3.1.3 Pipelines and Latency .....................................................................................................3-3
3.1.4 Data Registers.................................................................................................................3-3
3.1.5 Integer Saturation Arithmetic ...........................................................................................3-4
3.1.6 Comparisons ...................................................................................................................3-6
3.2.1 Example 1........................................................................................................................3-8
3.2.2 Example 2........................................................................................................................3-9
3.5.1 Load and Store Instructions...........................................................................................3-21
3.5.2 Move Instructions ..........................................................................................................3-24
3.5.3 Accumulator and DSPSC Move Instructions .................................................................3-27
3.5.4 Copy and Conversion Instructions.................................................................................3-31
3.5.5 Shift Instructions ............................................................................................................3-35
3.5.6 Compare Instructions ....................................................................................................3-36
3.5.7 Floating Point Arithmetic Instructions ............................................................................3-38
3.5.8 Integer Arithmetic Instructions .......................................................................................3-41
3.5.9 Accumulator Arithmetic Instructions ..............................................................................3-45
4.1.1 Boot ROM Hardware Operational Overview....................................................................4-1
4.1.2 Boot ROM Software Operational Overview .....................................................................4-1
4.2.1 UART Boot ......................................................................................................................4-6
4.2.2 SPI Boot ..........................................................................................................................4-6
4.2.3 FLASH Boot.....................................................................................................................4-6
4.2.4 SDRAM or SyncFLASH Boot ..........................................................................................4-7
2.3.2.1 Function and Operation of the AHB-to-APB Bridge.....................................2-12
2.3.6.1 Memory Access Rules .................................................................................2-17
3.2.1.1 Setup Code....................................................................................................3-8
3.2.1.2 C Code...........................................................................................................3-8
3.2.1.3 Accessing MaverickCrunch with ARM Co-Processor Instructions.................3-8
3.2.1.4 MaverickCrunch Assembly Language Instructions ........................................3-8
3.2.2.1 C Code...........................................................................................................3-9
3.2.2.2 MaverickCrunch Assembly Language Instructions ........................................3-9
4.1.1.1 Memory Map..................................................................................................4-1
4.1.2.1 Image Header ................................................................................................4-2
4.1.2.2 Boot Algorithm ...............................................................................................4-2
4.1.2.3 Flowchart .......................................................................................................4-3
©
Copyright 2007 Cirrus Logic, Inc.
DS785UM1
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