AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 92

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AU80610004671AAS LBMH

Manufacturer Part Number
AU80610004671AAS LBMH
Description
MPU, ATOM PROCESSOR, D410, FC-BGA8
Manufacturer
Intel
Series
ATOM - D400r
Datasheet

Specifications of AU80610004671AAS LBMH

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.7.13
92
DMILE1D - DMI Link Entry 1 Description
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
First part of a Link Entry which declares an internal link to another Root Complex
Element.
31:24
23:16
15:8
15:2
7:4
3:0
Bit
Bit
Access
Access
RWO
RWO
RO
RO
RO
RO
Default
Default
0000h
Value
Value
02h
00h
00h
0h
2h
RST/
RST/
PWR
PWR
Core
Core
Core
Core
Core
Core
0/0/0/DMIBAR
50-53h
00000000h
32 bits
RWO; RO;
BIOS Requirement: Must be initialized
according to guidelines in the PCI Express*
Isochronous/Virtual Channel Support Hardware
Programming Specification (HPS).
Number of Link Entries (NLE):
Indicates the number of link entries following
the Element Self Description. This field reports 2
(one for MCH egress port to main memory and
one to egress port belonging to SouthBridge on
other side of internal link).
Reserved ()
Element Type (ETYP):
Indicates the type of the Root Complex
Element.
Root Complex Link (DMI).
Target Port Number (TPN):
Specifies the port number associated with the
element targeted by this link entry (egress port
of SouthBridge). The target port number is with
respect to the component that contains this
element as specified by the target component
ID. This can be programmed by BIOS, but the
default value will likely be correct because the
DMI RCRB in the SouthBridge will likely be
associated with the default egress port for the
SouthBridge meaning it will be assigned port
number 0.
Target Component ID (TCID):
Identifies the physical component that is
targeted by this link entry. BIOS Requirement:
Must be initialized according to guidelines in the
PCI Express* Isochronous/Virtual Channel
Support Hardware Programming Specification
(HPS).
Reserved ()
Processor Configuration Registers
Value of 2 h represents an Internal
Description
Description
Datasheet

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