AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 34

• Manufacturer Part Number: AU80610004671AAS LBMH
• Description: MPU, ATOM PROCESSOR, D410, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D400r

Specifications of AU80610004671AAS LBMH

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

34
10:9
2:0
Bit
8
7
6
5
4
3
Access
RWC
RO
RO
RO
RO
RO
RO
RO
Default
Value
000b
00b
0b
1b
0b
0b
1b
0b
RST/
PWR
Core
Core
Core
Core
Core
Core
Core
Core
DEVSEL Timing (DEVT):
these bit positions have no effect. Device 0
does not physically connect to PCI_A. These
bits are set to "00" (fast decode) so that
optimum DEVSEL timing for PCI_A is not limited
by the CPU Uncore.
Master Data Parity Error Detected (DPD):
This bit is set when DMI received a Poisoned
completion from SouthBridge.
This bit can only be set when the Parity Error
Enable bit in the PCI Command register is set.
Fast Back-to-Back (FB2B):
positions have no effect. Device 0 does not
physically connect to PCI_A. This bit is set to 1
(indicating fast back-to-back capability) so that
the optimum setting for PCI_A is not limited by
the CPU Uncore.
Reserved ():
66 MHz Capable ():
hardwired to 0.
Capability List (CLIST):
configuration software that this device/function
implements a list of new capabilities. A list of
new capabilities is accessed via register CAPPTR
at configuration address offset 34h. Register
CAPPTR contains an offset pointing to the start
address within configuration space of this
device where the Capability Identification
register resides.
Reserved ():
Reserved ():
These bits are hardwired to "00". Writes to
This bit is hardwired to 1. Writes to these bit
Does not apply to PCI Express. Must be
This bit is hardwired to 1 to indicate to the
Processor Configuration Registers
Description
Datasheet