AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 119

• Manufacturer Part Number: AU80610004671AAS LBMH
• Description: MPU, ATOM PROCESSOR, D410, FC-BGA8
• Manufacturer: Intel
• Series: ATOM - D400r

Specifications of AU80610004671AAS LBMH

• Core Size: 64bit
• Cpu Speed: 1.66GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 559
• Operating Temperature Range: 0°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Processor Configuration Registers
Datasheet
9:8
7:4
3:2
Bit
1
0
Access
RO
RO
RO
RO
RO
Default
Value
0011b
00b
0h
0b
0b
NOTE: This register is locked and becomes
GTT Graphics Memory Size (GGMS):
This field is used to select the amount of Main
Memory that is pre-allocated to support the
Internal Graphics Translation Table. The BIOS
ensures that memory is pre-allocated only when
Internal graphics is enabled.
00: No memory pre-allocated. GTT cycles (Mem
and IO) are not claimed.
01: 1 MB of memory pre-allocated for GTT.
10: Reserved
11: Reserved
Note: This register is locked and becomes Read
Only when the D_LCK bit in the SMRAM register
is set.
Graphics Mode Select (GMS):
Memory that is pre-allocated to support the
Internal Graphics device in VGA (non-linear) and
Native (linear) modes. The BIOS ensures that
memory is pre-allocated only when Internal
graphics is enabled.
0000: No memory pre-allocated. Device 2 (IGD)
does not claim VGA cycles (Mem and IO), and
the Sub-Class Code field within Device 2
function 0 Class Code register is 80.
0001:
pre-allocated for frame buffer.
0011:
pre-allocated for frame buffer.
BIOS Requirement: BIOS must not set this field
to 000 if IVD (bit 1 of this register) is 0.
Reserved ():
IGD VGA Disable (IVD):
0: Enable. Device 2 (IGD) claims VGA memory
and IO cycles, the Sub-Class Code within Device
2 Class Code register is 00.
1: Disable. Device 2 (IGD) does not claim VGA
cycles (Mem and IO), and the Sub- Class Code
field within Device 2 function 0 Class Code
register is 80.
BIOS Requirement: BIOS must not set this bit to
0 if the GMS field (bits 6:4 of this register) pre-
allocates no memory. This bit MUST be set to 1
if Device 2 is disabled.
Reserved ():
This field is used to select the amount of Main
Read Only when the D_LCK bit in the
SMRAM register is set.
DVMT (UMA) mode, 1 MB of memory
DVMT (UMA) mode, 8 MB of memory
Description
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