AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 60
AU80610004671AAS LBMH
Manufacturer Part Number
AU80610004671AAS LBMH
Description
MPU, ATOM PROCESSOR, D410, FC-BGA8
Manufacturer
Intel
Series
ATOM - D400r
Datasheet
1.AU80610004392AAS_LBLA.pdf
(153 pages)
Specifications of AU80610004671AAS LBMH
Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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BIOS also knows the range from FEC0_0000h to FFFF_FFFFh is not usable by the
system. This 20MB range at the very top of addressable memory space is lost to APIC.
According to the above equation,TOLUD is originally calculated to: 4GB =
1_0000_0000h
space) - 35MB (lost memory) = 3GB - 35MB (minimum granularity) = ECB0_0000h
Since ECB0_0000h (PCI and other system requirements) is less than 1_0000_0000h,
TOLUD should be programmed to ECBh.
The system memory requirements are: 4GB (max addressable space) - 1GB (PCI
15:4
3:0
Bit
Access
RW/L
RO
Default
0000b
Value
001h
RST/
PWR
Core
Core
NOTE: The Top of Low Usable DRAM is the
Top of Low Usable DRAM (TOLUD):
This register contains bits 31 to 20 of an
address one byte above the maximum DRAM
memory below 4G that is usable by the
operating system. Address bits 31 down to 20
programmed to 01h implies a minimum memory
size of 1MBs. Configuration software must set
this value to the smaller of the following 2
choices: maximum amount memory in the
system minus ME stolen memory plus one byte
or the minimum address allocated for PCI
memory. Address bits 19:0 are assumed to be
0_0000h for the purposes of address
comparison. The Host interface positively
decodes an address towards DRAM if the
incoming address is less than the value
programmed in this register.
This register must be 64MB aligned
when reclaim is enabled.
Reserved (
Processor Configuration Registers
lowest address above both Graphics
Stolen memory and Tseg. BIOS
determines the base of Graphics Stolen
Memory by subtracting the Graphics
Stolen Memory Size from TOLUD and
further decrements by Tseg size to
determine base of Tseg.
Description
Datasheet
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