AU80610004671AAS LBMH Intel, AU80610004671AAS LBMH Datasheet - Page 150

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AU80610004671AAS LBMH

Manufacturer Part Number
AU80610004671AAS LBMH
Description
MPU, ATOM PROCESSOR, D410, FC-BGA8
Manufacturer
Intel
Series
ATOM - D400r
Datasheet

Specifications of AU80610004671AAS LBMH

Core Size
64bit
Cpu Speed
1.66GHz
Digital Ic Case Style
BGA
No. Of Pins
559
Operating Temperature Range
0°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1.10.27
150
PMCS - Power Management Control/Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
14:13
12:9
2:0
7:2
1:0
Bit
Bit
15
5
4
3
8
Access
Access
RW
RO
RO
RO
RO
RO
RO
RO
RO
RO
Default
Default
Value
Value
010b
00b
00h
00b
1b
0b
0b
0b
0h
0b
Device Specific Initialization (DSI):
initialization of the IGD is required before
generic class device driver is to use it.
Reserved ():
PME Clock (PMECLK):
support PME# generation.
Version (VER):
bytes of power management registers
implemented and that this device complies
with revision 1.1 of the PCI Power
Management Interface Specification.
PME Status (PMESTS):
This bit is 0 to indicate that IGD does not
support PME# generation from D3 (cold).
Data Scale (DSCALE):
The IGD does not support data register. This
bit always returns 0 when read, write
operations have no effect.
Data Select (DATASEL):
The IGD does not support data register. This
bit always returns 0 when read, write
operations have no effect.
PME Enable (PME_EN):
This bit is 0 to indicate that PME# assertion
from D3 (cold) is disabled.
Reserved ():
Power State (PWRSTAT):
This field indicates the current power state of
the IGD and can be used to set the IGD into a
new power state. If software attempts to write
Hardwired to 1 to indicate that special
Hardwired to 0 to indicate IGD does not
Hardwired to 010b to indicate that there are 4
0/2/1/PCI
D4-D5h
0000h
16 bits
RO; RW;
Processor Configuration Registers
Description
Description
Datasheet

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