AT90USB647-MU Atmel, AT90USB647-MU Datasheet - Page 161

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AT90USB647-MU

Manufacturer Part Number
AT90USB647-MU
Description
MCU, 8BIT, 64K FLASH, USB, 64QFN
Manufacturer
Atmel
Datasheets

Specifications of AT90USB647-MU

Controller Family/series
AT90
No. Of I/o's
48
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
16MHz
No. Of
RoHS Compliant
Core Size
8bit
Program Memory Size
64KB
Oscillator Type
External, Internal
Package
64QFN EP
Device Core
AVR
Family Name
AT90
Maximum Speed
20 MHz
Ram Size
4 KB
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
48
Interface Type
SPI/TWI/USART/USB
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
4
Lead Free Status / Rohs Status
 Details

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7593K–AVR–11/09
Table 15-2
mode.
Table 15-2.
Note:
Table 15-3
rect PWM mode.
Table 15-3.
Note:
• Bits 5:4 – COM2B1:0: Compare Match Output B Mode
These bits control the Output Compare pin (OC2B) behavior. If one or both of the COM2B1:0
bits are set, the OC2B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2B pin
must be set in order to enable the output driver.
When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 15-4.
COM2A1
COM2A1
COM2B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
pare Match is ignored, but the set or clear is done at TOP. See
page 157
shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM
shows the COM2A1:0 bit functionality when the WGM22:0 bits are set to phase cor-
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
Compare Output Mode, non-PWM Mode
COM2A0
COM2A0
COM2B0
0
1
0
1
0
1
0
1
0
1
0
1
for more details.
Table 15-4
Description
Normal port operation, OC2A disconnected.
WGM22 = 0: Normal Port Operation, OC0A Disconnected.
WGM22 = 1: Toggle OC2A on Compare Match.
Clear OC2A on Compare Match, set OC2A at TOP
Set OC2A on Compare Match, clear OC2A at TOP
Description
Normal port operation, OC2A disconnected.
WGM22 = 0: Normal Port Operation, OC2A Disconnected.
WGM22 = 1: Toggle OC2A on Compare Match.
Clear OC2A on Compare Match when up-counting. Set OC2A on
Compare Match when down-counting.
Set OC2A on Compare Match when up-counting. Clear OC2A on
Compare Match when down-counting.
Description
Normal port operation, OC2B disconnected.
Toggle OC2B on Compare Match
Clear OC2B on Compare Match
Set OC2B on Compare Match
shows the COM2B1:0 bit functionality when the WGM22:0 bits
(1)
AT90USB64/128
(1)
“Fast PWM Mode” on page 155
“Phase Correct PWM Mode” on
161

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