LPC1764FBD100 NXP Semiconductors, LPC1764FBD100 Datasheet - Page 52

• Manufacturer Part Number: LPC1764FBD100
• Description: IC, 32BIT MCU ARM CORTEX 100MHZ LQFP-100
• Manufacturer: NXP Semiconductors

Specifications of LPC1764FBD100

• Controller Family/series: (ARM Cortex)
• No. Of I/o's: 70
• Ram Memory Size: 32KB
• Cpu Speed: 100MHz
• No. Of Timers: 4
• Interface: CAN, I2C, SPI, UART
• Core Size: 32 Bit
• Program Memory Size: 128KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 14.
C
[1]
LPC1768_66_65_64_2
Objective data sheet
Symbol
t
t
t
V
t
t
t
t
t
t
r
f
FRFM
FEOPT
FDEOP
JR1
JR2
EOPR1
EOPR2
Fig 19. Differential data-to-EOP transition skew and EOP width
L
CRS
= 50 pF; R
Characterized but not implemented as production test. Guaranteed by design.
T
PERIOD
differential
data lines
Parameter
rise time
fall time
differential rise and fall time matching
output signal crossover voltage
source SE0 interval of EOP
source jitter for differential transition to SE0
transition
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
EOP width at receiver
Dynamic characteristics: USB pins (full-speed)
pu
= 1.5 k on D+ to V
11.6 USB interface
n
differential data to
crossover point
DD(3V3)
SE0/EOP skew
T
PERIOD
; unless otherwise specified.
+ t
FDEOP
Rev. 02 — 11 February 2009
Conditions
10 % to 90 %
10 % to 90 %
see
see
10 % to 90 %
must reject as EOP; see
Figure 19
must accept as EOP;
see
t
r
/ t
f
Figure 19
Figure 19
Figure 19
crossover point
extended
32-bit ARM Cortex-M3 microcontroller
LPC1768/66/65/64
[1]
[1]
Min
-
160
40
82
8.5
7.7
1.3
2
18.5
9
source EOP width: t
receiver EOP width: t
Typ
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2009. All rights reserved.
Max
13.8
13.7
109
2.0
175
+5
+18.5
+9
-
-
FEOPT
002aab561
EOPR1
, t
EOPR2
Unit
ns
ns
%
V
ns
ns
ns
ns
ns
ns
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