ADSP-BF538BBCZ-5F4 Analog Devices Inc, ADSP-BF538BBCZ-5F4 Datasheet - Page 34

IC, FLOAT-PT DSP, 16BIT, 533MHZ, BGA-316

ADSP-BF538BBCZ-5F4

Manufacturer Part Number
ADSP-BF538BBCZ-5F4
Description
IC, FLOAT-PT DSP, 16BIT, 533MHZ, BGA-316
Manufacturer
Analog Devices Inc
Series
Blackfinr
Type
Fixed Pointr

Specifications of ADSP-BF538BBCZ-5F4

No. Of Bits
16 Bit
Frequency
533MHz
Supply Voltage
1.25V
Embedded Interface Type
CAN, I2C, PPI, SPI, TWI, UART
No. Of I/o's
54
Flash Memory Size
512KB
Interface
CAN, SPI, SSP, TWI, UART
Clock Rate
533MHz
Non-volatile Memory
FLASH (512 kB)
On-chip Ram
148kB
Voltage - I/o
3.00V, 3.30V
Voltage - Core
1.25V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
316-CSPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ADZS-BFAUDIO-EZEXT - BOARD EVAL AUDIO BLACKFIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
ADSP-BF538/ADSP-BF538F
External Port Bus Request and Grant Cycle Timing
Table 28
on Page 35
operations for synchronous and for asynchronous BR.
Table 28. External Port Bus Request and Grant Cycle Timing with Synchronous BR
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
t
BS
BH
SD
SE
DBG
EBG
DBH
EBH
and
describe external port bus request and grant cycle
Table 29 on Page 35
BR Setup to Falling Edge of CLKOUT
Falling Edge of CLKOUT to BR Deasserted Hold Time
CLKOUT Low to AMSx, Address, and ARE/AWE Disable
CLKOUT Low to AMSx, Address, and ARE/AWE Enable
CLKOUT High to BG High Setup
CLKOUT High to BG Deasserted Hold Time
CLKOUT High to BGH High Setup
CLKOUT High to BGH Deasserted Hold Time
ADDR 19-1
CLKOUT
ABE1-0
AMSx
AWE
BGH
ARE
BR
BG
and
Figure 17. External Port Bus Request and Grant Cycle Timing with Synchronous BR
t
BS
Figure 17
and
Rev. D | Page 34 of 56 | July 2010
Figure 18
t
BH
t
t
t
SD
SD
t
t
DBG
DBH
Min
4.6
1.0
t
t
EBG
EBH
t
t
t
SE
SE
SE
Max
4.5
4.5
4.0
4.0
4.0
4.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns

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