ADSP-BF538BBCZ-5F4 Analog Devices Inc, ADSP-BF538BBCZ-5F4 Datasheet - Page 3

• Manufacturer Part Number: ADSP-BF538BBCZ-5F4
• Description: IC, FLOAT-PT DSP, 16BIT, 533MHZ, BGA-316
• Manufacturer: Analog Devices Inc
• Series: Blackfinr
• Type: Fixed Pointr

Specifications of ADSP-BF538BBCZ-5F4

• No. Of Bits: 16 Bit
• Frequency: 533MHz
• Supply Voltage: 1.25V
• Embedded Interface Type: CAN, I2C, PPI, SPI, TWI, UART
• No. Of I/o's: 54
• Flash Memory Size: 512KB
• Interface: CAN, SPI, SSP, TWI, UART
• Clock Rate: 533MHz
• Non-volatile Memory: FLASH (512 kB)
• On-chip Ram: 148kB
• Voltage - I/o: 3.00V, 3.30V
• Voltage - Core: 1.25V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 316-CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-BFAUDIO-EZEXT - BOARD EVAL AUDIO BLACKFIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

GENERAL DESCRIPTION
The ADSP-BF538/ADSP-BF538F processors are members of
the Blackfin
Devices, Inc./Intel Micro Signal Architecture (MSA). Blackfin
processors combine a dual-MAC state-of-the-art signal process-
ing engine, the advantages of a clean, orthogonal RISC-like
microprocessor instruction set, and single-instruction, multi-
ple-data (SIMD) multimedia capabilities into a single
instruction set architecture.
The ADSP-BF538/ADSP-BF538F processors are completely
code compatible with other Blackfin processors, differing only
with respect to performance, peripherals, and on-chip memory.
Specific performance, peripherals, and memory configurations
are shown in
Table 1. Processor Features
By integrating a rich set of industry-leading system peripherals
and memory, Blackfin processors are the platform of choice for
next generation applications that require RISC-like program-
mability, multimedia support, and leading edge signal
processing in one integrated package.
LOW POWER ARCHITECTURE
Blackfin processors provide world class power management and
performance. They are designed using a low power and low
voltage methodology and feature dynamic power management,
which is the ability to vary both the voltage and frequency of
operation to significantly lower overall power consumption.
Varying the voltage and frequency can result in a substantial
reduction in power consumption, compared with just varying
the frequency of operation. This translates into longer battery
life and lower heat dissipation.
Feature
SPORTs
UARTs
SPI
TWI
CAN
PPI
Internal 8M bit
Parallel Flash
Instruction
SRAM/Cache
Instruction SRAM
Data SRAM/Cache
Data SRAM
Scratchpad
Maximum
Frequency
Package Option
®
Table
family of products, incorporating the Analog
1.
ADSP-BF538
4
3
3
2
1
1
—
16K bytes
64K bytes
32K bytes
32K bytes
4K bytes
533 MHz
1066 MMACS
BC-316
ADSP-BF538F8
4
3
3
2
1
1
1
16K bytes
64K bytes
32K bytes
32K bytes
4K bytes
533 MHz
1066 MMACS
BC-316
Rev. D | Page 3 of 56 | July 2010
SYSTEM INTEGRATION
The ADSP-BF538/ADSP-BF538F processors are highly inte-
grated system-on-a-chip solutions for the next generation of
consumer and industrial applications including audio and video
signal processing. By combining advanced memory configura-
tions, such as on-chip flash memory, industry-standard
interfaces, and a high performance signal processing core, cost-
effective solutions can be quickly developed, without the need
for costly external components. The system peripherals include
three UART ports, three SPI ports, four serial ports (SPORTs),
one CAN interface, two 2-wire interfaces (TWI), four general-
purpose timers (three with PWM capability), a real-time clock, a
watchdog timer, a parallel peripheral interface (PPI), and gen-
eral-purpose I/O pins.
ADSP-BF538/ADSP-BF538F PROCESSOR
PERIPHERALS
The ADSP-BF538/ADSP-BF538F processors contain a rich set
of peripherals connected to the core via several high bandwidth
buses, providing flexibility in system configuration as well as
excellent overall system performance (see the block diagram 1).
The general-purpose peripherals include functions such as
UART, timers with PWM (pulse-width modulation) and pulse
measurement capability, general-purpose I/O pins, a real-time
clock, and a watchdog timer. This set of functions satisfies a
wide variety of typical system support needs and is augmented
by the system expansion capabilities of the device. In addition to
these general-purpose peripherals, the processors contain high
speed serial and parallel ports for interfacing to a variety of
audio, video, and modem codec functions. A CAN 2.0B control-
ler is provided for automotive and industrial control networks.
An interrupt controller manages interrupts from the on-chip
peripherals or from external sources. Power management con-
trol functions tailor the performance and power characteristics
of the processors and system to many application scenarios.
All of the peripherals, except for general-purpose I/O, CAN,
TWI, real-time clock, and timers, are supported by a flexible
DMA structure. There are also four separate memory DMA
channels dedicated to data transfers between the processor’s
various memory spaces, including external SDRAM and asyn-
chronous memory. Multiple on-chip buses running at up to
133 MHz provide enough bandwidth to keep the processor core
running with activity on all of the on-chip and external
peripherals.
The ADSP-BF538/ADSP-BF538F processors include an on-chip
voltage regulator in support of the processor’s dynamic power
management capability. The voltage regulator provides a range
of core voltage levels from V
bypassed as needed.
ADSP-BF538/ADSP-BF538F
DDEXT
. The voltage regulator can be