ADSP-BF538BBCZ-5F4 Analog Devices Inc, ADSP-BF538BBCZ-5F4 Datasheet - Page 29

• Manufacturer Part Number: ADSP-BF538BBCZ-5F4
• Description: IC, FLOAT-PT DSP, 16BIT, 533MHZ, BGA-316
• Manufacturer: Analog Devices Inc
• Series: Blackfinr
• Type: Fixed Pointr

Specifications of ADSP-BF538BBCZ-5F4

• No. Of Bits: 16 Bit
• Frequency: 533MHz
• Supply Voltage: 1.25V
• Embedded Interface Type: CAN, I2C, PPI, SPI, TWI, UART
• No. Of I/o's: 54
• Flash Memory Size: 512KB
• Interface: CAN, SPI, SSP, TWI, UART
• Clock Rate: 533MHz
• Non-volatile Memory: FLASH (512 kB)
• On-chip Ram: 148kB
• Voltage - I/o: 3.00V, 3.30V
• Voltage - Core: 1.25V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 316-CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADZS-BFAUDIO-EZEXT - BOARD EVAL AUDIO BLACKFIN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Asynchronous Memory Read Cycle Timing
Table 23
on Page 30
tions for synchronous and for asynchronous ARDY.
Table 23. Asynchronous Memory Read Cycle Timing with Synchronous ARDY
1
Parameter
Timing Requirements
t
t
t
t
Switching Characteristic
t
t
Output pins include AMS3–0, ABE1–0, ADDR19–1, AOE, ARE.
SDAT
HDAT
SARDY
HARDY
DO
HO
and
describe asynchronous memory read cycle opera-
Table 24 on Page 30
DATA15–0 Setup Before CLKOUT
DATA15–0 Hold After CLKOUT
ARDY Setup Before the Falling Edge of CLKOUT
ARDY Hold After the Falling Edge of CLKOUT
Output Delay After CLKOUT
Output Hold After CLKOUT
ADDR19–1
DATA 15–0
CLKOUT
ABE1–0
AMSx
ARDY
AOE
ARE
t
DO
and
2 CYCLES
Figure 12. Asynchronous Memory Read Cycle Timing with Synchronous ARDY
SETUP
Figure 12
1
1
t
DO
and
Rev. D | Page 29 of 56 | July 2010
Figure 13
PROGRAMMED READ
ACCESS 4 CYCLES
t
SARDY
t
HARDY
t
SARDY
ACCESS EXTENDED
3 CYCLES
t
HARDY
ADSP-BF538/ADSP-BF538F
t
SDAT
1 CYCLE
t
HO
HOLD
t
HDAT
Min
2.1
0.8
4.0
0.0
0.8
t
HO
Max
6.0
Unit
ns
ns
ns
ns
ns
ns