AD5522JSVDZ Analog Devices Inc, AD5522JSVDZ Datasheet - Page 45
![IC, DAC, 16BIT, QFP-80](/photos/7/64/76487/ad5522jsvdz_sml.jpg)
AD5522JSVDZ
Manufacturer Part Number
AD5522JSVDZ
Description
IC, DAC, 16BIT, QFP-80
Manufacturer
Analog Devices Inc
Datasheet
1.AD5522JSVDZ.pdf
(64 pages)
Specifications of AD5522JSVDZ
Resolution (bits)
16bit
Input Channel Type
Serial
Supply Voltage Range - Digital
2.3V To 5.25V
Supply Current
36mA
Digital Ic Case Style
QFP
No. Of Pins
80
Data Interface
LVDS, Serial
Design Resources
Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD5522JSVDZ
Manufacturer:
WD
Quantity:
1 000
Company:
Part Number:
AD5522JSVDZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD5522JSVDZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
All codes not explicitly referenced in this table are reserved and should not be used (see Table 29).
Table 20. Read and Write Functions of the AD5522
B28
RD/WR
Write Functions
0
0
0
0
0
Write Addressed DAC or PMU Register
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Read Functions
1
1
1
1
Read Addressed DAC or PMU Register (Only One PMU or DAC Register Can Be Read at One Time)
1
1
1
1
B27
PMU3
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
B26
PMU2
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
0
B25
PMU1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
0
1
0
0
B24
PMU0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
1
0
0
0
B23
MODE1
0
0
1
1
1
Select DAC or
PMU register
(see
0
0
1
1
Select PMU or
DAC register
(see
Table 19
Table 19
B22
MODE0
0
1
0
1
1
0
1
0
1
)
)
Rev. D | Page 45 of 64
B21 to B0
Data bits
Data bits
Data bits
Data bits
All 1s
Data bits other than all 1s
Address and data bits
All 0s
All 0s
X (don’t care)
All 0s
All 0s if reading PMU
registers; DAC address
plus all 0s if reading a
DAC register DAC address
(see
Table 29
)
CH3
Write to system control register (see
Reserved
Reserved
NOP (no operation)
Reserved
CH3
CH3
CH3
CH3
CH3
CH3
CH3
CH3
Read from system control register
Read from comparator status register
Reserved
Read from alarm status register
CH3
CH2
CH2
CH2
CH2
CH2
CH2
CH2
CH2
CH2
CH2
Selected Channel
CH1
CH1
CH1
CH1
CH1
CH1
CH1
CH1
CH1
CH1
AD5522
Table 23
CH0
CH0
CH0
CH0
CH0
CH0
CH0
CH0
CH0
CH0
)