AD5522JSVDZ Analog Devices Inc, AD5522JSVDZ Datasheet - Page 19
![IC, DAC, 16BIT, QFP-80](/photos/7/64/76487/ad5522jsvdz_sml.jpg)
AD5522JSVDZ
Manufacturer Part Number
AD5522JSVDZ
Description
IC, DAC, 16BIT, QFP-80
Manufacturer
Analog Devices Inc
Datasheet
1.AD5522JSVDZ.pdf
(64 pages)
Specifications of AD5522JSVDZ
Resolution (bits)
16bit
Input Channel Type
Serial
Supply Voltage Range - Digital
2.3V To 5.25V
Supply Current
36mA
Digital Ic Case Style
QFP
No. Of Pins
80
Data Interface
LVDS, Serial
Design Resources
Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Manufacturer:
WD
Quantity:
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Company:
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Manufacturer:
Analog Devices Inc
Quantity:
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Table 7. Pin Function Descriptions
Pin No.
1
2, 14, 19,
42, 59
3
4
5
Mnemonic
Exposed pad
EXTFOH0
AVSS
RESET
TMPALM
CGALM
SYS_FORCE
NOTES
1. THE EXPOSED PAD IS ELECTRICALLY CONNECTED TO AVSS.
SYS_SENSE
MEASOUT0
MEASOUT1
MEASOUT2
MEASOUT3
EXTFOH0
EXTFOH1
SPI/LVDS
TMPALM
DUTGND
REFGND
Description
The exposed pad is electrically connected to AVSS.
Force Output for High Current Range (Channel 0). Use an external resistor at this pin for current ranges up to
±80 mA. For more information, see the Current Range Selection section.
Negative Analog Supply Voltage.
Digital Reset Input. This active low, level sensitive input resets all internal nodes on the device to their power-
on reset values.
Open-Drain Output for Temperature Alarm. This latched, active low, open-drain output flags a temperature
alarm to indicate that the junction temperature has exceeded the default temperature setting (130°C) or the
user programmed temperature setting. Two flags in the alarm status register (one latched, one unlatched)
indicate whether the temperature has dropped below 130°C or remains above 130°C. User action is required
to clear this latched alarm flag by writing to the clear bit (Bit 6) in any of the PMU registers.
Open-Drain Output for Guard and Clamp Alarms. This open-drain pin provides shared alarm information
about the guard amplifier and clamp circuitry. By default, this output pin is disabled. The system control
register allows the user to enable this function and to set the open-drain output as a latched output. The user
can also choose to enable alarms for the guard amplifier, the clamp circuitry, or both. When this pin flags an
alarm, the origins of the alarm can be determined by reading back the alarm status register. Two flags per
channel in this word (one latched, one unlatched) indicate which function caused the alarm and whether the
alarm is still present.
CGALM
RESET
AGND
AVDD
AVSS
AVSS
AVSS
VREF
12
16
19
10
11
13
14
15
17
18
20
1
2
3
4
5
6
7
8
9
21
80
PIN 1
22
79
23
78
Figure 9. Pin Configuration, Exposed Pad on Top
24
77
25
76
26
75
27
74
EXPOSED PAD ON TOP
28
Rev. D | Page 19 of 64
73
(Not to Scale)
29
AD5522
TOP VIEW
72
30
71
31
70
32 33
69
68
34
67
35
66
36
65
37
64
38
63
39
62
40
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
EXTFOH2
AVSS
BUSY
SCLK
CPOL0/SCLK
CPOH0/SDI
SDI
SYNC
CPOL1/SYNC
DGND
CPOH1/SDO
SDO
LOAD
DVCC
CPOL2/CPO0
CPOH2/CPO1
CPOL3/CPO2
CPOH3/CPO3
AVSS
EXTFOH3
AD5522