PC28F128P33T85A NUMONYX, PC28F128P33T85A Datasheet - Page 45

IC FLASH 128MBIT 85NS 64EZBGA

PC28F128P33T85A

Manufacturer Part Number
PC28F128P33T85A
Description
IC FLASH 128MBIT 85NS 64EZBGA
Manufacturer
NUMONYX
Series
StrataFlash™r
Datasheet

Specifications of PC28F128P33T85A

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (8Mx16)
Speed
85ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TBGA
Cell Type
NOR
Density
128Mb
Access Time (max)
85ns
Interface Type
Parallel/Serial
Boot Type
Top
Address Bus
23b
Operating Supply Voltage (typ)
2.5/3.3V
Operating Temp Range
-40C to 85C
Package Type
EZBGA
Sync/async
Async/Sync
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
8M
Supply Current
28mA
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
888065
888065
PC28F128P33T85 888065

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PC28F128P33T85A
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Numonyx™ StrataFlash
Table 23: Command Bus Cycles
November 2007
Order Number: 314749-05
Notes:
1.
2.
3.
4.
Configuration
Protection
Unlocking
Locking/
Program
Suspend
Erase
Block
Mode
Read
First command cycle address should be the same as the operation’s target address.
DBA = Device Base Address (NOTE: needed for dual-die 512Mbit device)
DnA = Address within the device.
IA = Identification code address offset.
QA = CFI Query address offset.
WA = Word address of memory location to be written.
BA = Address within the block.
PRA = Protection Register address.
LRA = Lock Register address.
RCD = Read Configuration Register data on QUAD+ A[15:0] or EASY BGA / TSOP A[16:1].
ID = Identifier data.
QD = Query data on DQ[15:0].
SRD = Status Register data.
WD = Word data.
N = Word count of data to be loaded into the write buffer.
PD = Protection Register data.
LRD = Lock Register data.
The second cycle of the Buffered Program Command is the word count of the data to be loaded into the write buffer. This
is followed by up to 32 words of data.Then the confirm command (0xD0) is issued, triggering the array programming
operation.
The confirm command (0xD0) is followed by the buffer data.
Read Array
Read Device Identifier
CFI Query
Read Status Register
Clear Status Register
Word Program
Buffered Program
Buffered Enhanced Factory
Program (BEFP)
Block Erase
Program/Erase Suspend
Program/Erase Resume
Lock Block
Unlock Block
Lock-down Block
Program Protection Register
Program Lock Register
Program Read Configuration
Register
®
Command
Embedded Memory (P33)
(4)
(3)
Cycles
Bus
≥ 2
≥ 2
> 2
> 2
1
2
1
2
2
2
2
1
1
2
2
2
2
Oper
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
First Bus Cycle
Addr
DnA
DnA
DnA
DnA
DnA
DnA
DnA
RCD
PRA
LRA
WA
WA
WA
BA
BA
BA
BA
(1)
Data
0x40/
0xD0
0xC0
0xC0
0x90
0x98
0x70
0x50
0x10
0xE8
0x80
0x20
0xB0
0x60
0x60
0x60
0x60
0xFF
(2)
Oper
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Read
Read
Read
-
-
-
-
Second Bus Cycle
DBA + QA
DBA + IA
Addr
DnA
RCD
PRA
LRA
WA
WA
WA
BA
BA
BA
BA
-
-
-
-
(1)
Data
Datasheet
0xD0
0xD0
0xD0
N - 1
0x01
0x2F
0x03
SRD
LRD
WD
QD
PD
ID
-
-
-
-
(2)
45

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