ML610Q429-NNNTBZ03A7 Rohm Semiconductor, ML610Q429-NNNTBZ03A7 Datasheet - Page 165
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ML610Q429-NNNTBZ03A7
Manufacturer Part Number
ML610Q429-NNNTBZ03A7
Description
MCU 8BIT 48K FLASH 128-TQFP
Manufacturer
Rohm Semiconductor
Datasheets
1.ML610Q482P-NNNTB03A7.pdf
(20 pages)
2.ML610Q428-NNNTBZ03A7.pdf
(32 pages)
3.ML610Q428-NNNTBZ03A7.pdf
(434 pages)
Specifications of ML610Q429-NNNTBZ03A7
Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML610Q429-NNNTBZ03A7
Manufacturer:
Rohm
Quantity:
900
Company:
Part Number:
ML610Q429-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
- ML610Q482P-NNNTB03A7 PDF datasheet
- ML610Q428-NNNTBZ03A7 PDF datasheet #2
- ML610Q428-NNNTBZ03A7 PDF datasheet #3
- Current page: 165 of 434
- Download datasheet (3Mb)
11.3 Description of Operation
The WDT counter starts counting after the system reset has been released and the low-speed clock oscillation start..
Write "5AH" when the internal pointer (WDP) is "0"and then the WDT counter is cleared by writing "0A5H" when
WDP is "1".
WDP is reset to “0” at the time of system reset or when the WDT counter overflows and is inverted whenever data is
written to WDTCON.
When the WDT counter cannot be cleared within the WDT counter overflow period (T
(WDTINT) occurs. If the WDT counter is not cleared even by the software processing performed following the
watchdog timer interrupt and overflow occurs again, WDT reset occurs and the mode shifts to a system reset mode.
For the overflow period (TWOV) of the WDT counter, one of 125ms, 500ms, 2s, and 8s can be selected by the
watchdog mode register (WDTMOD).
Clear the WDT counter within the clear period of the WDT counter shown in Table 11-1.
WDT1
0
0
1
1
WDT0
0
1
0
1
Table 11-1 Clear Period of WDT Counter
2000 ms
8000 ms
125 ms
500 ms
T
WOV
11 – 5
ML610Q428/ML610Q429 User’s Manual
Approx. 1996 ms
Approx. 7996 ms
Approx. 121 ms
Approx. 496 ms
T
Chapter 11 Watchdog Timer
WCL
WOV
), a watchdog timer interrupt
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