ML610Q429-NNNTBZ03A7 Rohm Semiconductor, ML610Q429-NNNTBZ03A7 Datasheet - Page 111

• Manufacturer Part Number: ML610Q429-NNNTBZ03A7
• Description: MCU 8BIT 48K FLASH 128-TQFP
• Manufacturer: Rohm Semiconductor

Specifications of ML610Q429-NNNTBZ03A7

• Core Processor: nX-U8/100
• Core Size: 8-Bit
• Speed: 4.2MHz
• Connectivity: I²C, SSP, UART/USART
• Peripherals: LCD, Melody Driver, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 2x12b, 2x24b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.3
7.3.1
The low-speed time base counter (LTBC) starts counting from 0000H on the LSCLK falling edge after system reset.
The T128HZ, T64HZ, T32HZ, T16HZ, T8HZ, T4HZ, T2HZ, and T1HZ outputs of LTBC are used as time base
interrupts and an interrupt is requested on the falling edge of each output. Each of LTBC outputs is also used as an
operation clock for peripheral circuits.
The output data of T128HZ to T1HZ of LTBC can be read from the low-speed time base counter register (LTBR).
When reading the data, read LTBR twice and check that the two values coincide to prevent reading of undefined data
during counting.
Figure 7-3 shows an example of program to read LTBR.
LTBR is reset when write operation is performed and the T128HZ to T1HZ outputs are set to “0”. Write data is invalid.
Since an interrupt occurs if a falling edge occurs in the T128Hz to T1Hz outputs during writing to LTBR, take care in
software programming. Figure 7-4 shows interrupt generation timing and reset timing of the time base counter output
by writing to LTBR.
MARK:
;
;
Description of Operation
LTBR Write
Low-Speed Time Base Counter
T256HZ
T128HZ
T64HZ
T32HZ
T16HZ
T16HZ
T8HZ
T4HZ
T2HZ
T1HZ
LEA
L
L
CMP
BNE
Figure 7-4 Interrupt Timing and Reset Timing by Writing to LTBR
:
Figure 7-3 Programming Example for Reading LTBR
offset LTBR
R0,
R1,
R0,
MARK
[EA]
[EA]
R1
; EA←LTBR address
; 1st read
; 2nd read
; Comparison for LTBR
; To MARK when the values do not coincide
7 – 7
ML610Q428/ML610Q429 User’s Manual
Chapter 7 Time Base Counter
Indicates interrupt timing