MMA8450QT Freescale Semiconductor, MMA8450QT Datasheet - Page 24

• Manufacturer Part Number: MMA8450QT
• Description: Board Mount Accelerometers 12bit 3-Axis FIFO HPF PL
• Manufacturer: Freescale Semiconductor

Specifications of MMA8450QT

• Sensing Axis: X, Y, Z
• Acceleration: 2 g, 4 g, 8 g
• Digital Output - Number Of Bits: 12 bit
• Supply Voltage (max): 1.89 V
• Supply Voltage (min): 1.71 V
• Supply Current: 3 uA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Shutdown: Yes
• Sensitivity: 0.976 mg/digit, 1.953 mg/digit, 3.906 mg/digit
• Package / Case: QFN-16
• Output Type: Digital
• Package Type: QFN
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 3mm
• Product Height (mm): 1mm
• Product Length (mm): 3mm
• Mounting: Surface Mount
• Pin Count: 16
• Acceleration Range: ± 2g, ± 4g, ± 8g
• No. Of Axes: 3
• Ic Interface Type: I2C, Serial
• Sensor Case Style: QFN
• No. Of Pins: 16
• Supply Voltage Range: 1.71V To 1.89V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIFO data output register driver is enabled, the 12 sample data output registers point to the head of the FIFO buffer which
contains the previous 32 X, Y, and Z data samples. This applies for the 8-bit data and the 12-bit data.
OUT_X_MSB register (0x01); therefore all 8-bit accesses of the FIFO buffer data must use the I
(0x12) FIFO root data pointer shares the same address location as the OUT_X_LSB register (0x05); therefore all 12-bit accesses
of the FIFO buffer data must use the I
0x0A returns a value of 0x00.
0x0C - 0x0E: OUT_X_DELTA, OUT_Y_DELTA, OUT_Z_DELTA AC Data Registers
output of the user definable high pass filter. The data cuts out the low frequency data, which is useful in that the offset data is
removed. The value of the high pass filter cut-off frequency is set in Register 0x17.
Note: The OUT_X_DELTA, OUT_Y_DELTA, OUT_Z_DELTA registers store the high pass filtered “delta data” information regardless of the state
0x0F: WHO_AM_I Device ID Register
by a byte of NVM. A custom alternate value can be set by customer request.
6.2
information on the FIFO please refer to AN3920.
0x10: F_STATUS FIFO Status Register
watermark. It also has a counter that can be read to obtain the number of samples stored in the buffer.
Table 13. FIFO Flag Event Description
interrupt bit flag in the interrupt source register (INT_SOURCE) by reading the F_STATUS register.
asserted while the F_CNT value is greater than the F_WMRK value.
0x0C OUT_X_DELTA: AC X 8-Bit Data Register (Read Only)
0x0D OUT_Y_DELTA: AC Y 8-Bit Data Register (Read Only)
0x0E OUT_Z_DELTA: AC Z 8-Bit Data Register (Read Only)
24
MMA8450Q
0x0F WHO_AM_I: Device ID Register (Read Only)
0x10 F_STATUS: FIFO STATUS Register (Read Only)
The sample data output registers store the current sample data if the FIFO data output register driver is disabled, but if the
When the FDE bit is set to logic 1, the F_8DATA (0x11) FIFO root data pointer shares the same address location as the
X, Y, and Z-axis 8-bit high pass filtered output data is expressed as 2's complement numbers. The data is obtained from the
This register contains the device identifier which for MMA8450Q is set to 0xC6 by default. The value is factory programmed
The following registers are used to configure the FIFO. The following are the FIFO registers for the MMA8450Q. For more
The FIFO Status Register is used to retrieve information about the FIFO. This register has a flag for the overflow and
F_OVF
The F_OVF and F_WMRK_FLAG flags remain asserted while the event source is still active, but the user can clear the FIFO
Therefore the F_OVF bit flag will remain asserted while the FIFO has overflowed and the F_WMRK_FLAG bit flag will remain
F_OVF
—
—
of the FIFO data output register driver bit. Register 0x0B always reflects the status of the delta data.
0
1
Bit 7
Bit 7
Bit 7
Bit 7
XD7
YD7
ZD7
Bit 7
1
32 Sample FIFO
F_WMRK_FLAG
F_WMRK_FLAG
—
—
0
1
Bit 6
Bit 6
Bit 6
XD6
YD6
Bit 6
ZD6
1
Bit 6
No FIFO overflow events detected.
FIFO event detected; FIFO has overflowed.
No FIFO watermark events detected.
FIFO event detected; FIFO sample count is greater than watermark value.
2
Bit 5
Bit 5
Bit 5
XD5
YD5
Bit 5
ZD5
C address 0x05. All reads to register addresses 0x02, 0x03, 0x06, 0x07, 0x08, 0x09, and
0
F_CNT5
Bit 5
Bit 4
Bit 4
Bit 4
Bit 4
XD4
YD4
ZD4
0
F_CNT4
Bit 4
Bit 3
Bit 3
Bit 3
Bit 3
XD3
YD3
ZD3
F_CNT3
0
Event Description
Bit 3
Bit 2
Bit 2
Bit 2
Bit 2
F_CNT2
XD2
YD2
ZD2
1
Bit 2
2
C address 0x01. The F_12DATA
F_CNT1
Bit 1
Bit 1
Bit 1
Bit 1
XD1
YD1
ZD1
Freescale Semiconductor
Bit 1
1
F_CNT0
Bit 0
Bit 0
Bit 0
Bit 0
YD0
Bit 0
XD0
ZD0
0
Sensors