WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 170

• Manufacturer Part Number: WM8352GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8352GEB/V

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, 4-Wire)
• Resolution: 12 bit
• Operating Supply Voltage: 3.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 260 uA
• Thd Plus Noise: - 83 dB
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 8
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 95dB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8352
19 AUXILIARY ADC
19.1 GENERAL DESCRIPTION
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The WM8352 incorporates a low-power 12-bit Auxiliary ADC (AUXADC). This can be used to
measure a number of internal or external voltages, with either VREF or VRTC as its reference. A
programmable potential divider enables the AUXADC to measure voltages higher than the reference.
Note that the AUX1 pin is also the input for the battery pack temperature monitoring circuit and is
therefore not freely available for other analogue inputs. The battery NTC input can still be sampled
and readback via AUX1 in the same way as the other AUXADC inputs. The AUX1 pin may be used
for other purposes if the NTC detection is disabled and/or the associated Battery Charger interrupts
are masked. See Section 17.7 for details of the battery pack NTC functions.
The AUXADC circuit is illustrated in Figure 78.
Figure 78 Auxiliary ADC
The AUXADC is enabled using the AUXADC_ENA register bit as described in Table 113.
R12 (0Ch) Power
Mgmt (5)
R144 (90h)
Digitizer Control
(1)
Note: AUXADC_ENA can be accessed through R12 or through R144. Reading from or writing to
either register location has the same effect.
Table 113 AUXADC Enable
ADDRESS
BIT
15
7
AUXADC_ENA
LABEL
DEFAULT
0
AUXADC control
0 = disabled
1 = enabled
PD, March 2010, Rev 4.2
DESCRIPTION
Production Data
170