WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 227
WM8352GEB/V
Manufacturer Part Number
WM8352GEB/V
Description
Audio CODECs Audio CODEC plus pwr management
Manufacturer
Wolfson Microelectronics
Datasheet
1.WM8352GEBV.pdf
(335 pages)
Specifications of WM8352GEB/V
Number Of Adc Inputs
2
Number Of Dac Outputs
2
Conversion Rate
48 KSPS
Interface Type
Serial (2-Wire, 3-Wire, 4-Wire)
Resolution
12 bit
Operating Supply Voltage
3.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
BGA
Minimum Operating Temperature
- 25 C
Number Of Channels
2 ADC/2 DAC
Supply Current
260 uA
Thd Plus Noise
- 83 dB
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
8
No. Of Output Channels
6
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
95dB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Production Data
Register 0Ch Power mgmt (5)
w
REGISTER
REGISTER
Power mgmt
ADDRESS
ADDRESS
R13 (0Dh)
(6)
BIT
BIT
15
11
10
7
3
2
1
0
9
AUXADC_ENA
DCMP4_ENA
DCMP3_ENA
DCMP2_ENA
DCMP1_ENA
LDO4_ENA
LDO3_ENA
LDO2_ENA
LABEL
LS_ENA
LABEL
DEFAULT
DEFAULT
0
0
0
0
0
0
0
0
0
Limit Switch enable
0 = disabled
1 = enabled
Note: internal conditions may prevent the converter
from actually switching on - see DCDC/LDO Status
register for actual converter status.
Reset by state machine. Default held in metal mask.
LDO4 enable
0 = disabled
1 = enabled
Note: internal conditions may prevent the converter
from actually switching on - see DCDC/LDO Status
register for actual converter status.
Reset by state machine. Default held in metal mask.
LDO3 enable
0 = disabled
1 = enabled
Note: internal conditions may prevent the converter
from actually switching on - see DCDC/LDO Status
register for actual converter status.
Reset by state machine. Default held in metal mask.
LDO2 enable
0 = disabled
1 = enabled
Note: internal conditions may prevent the converter
from actually switching on - see DCDC/LDO Status
register for actual converter status.
Reset by state machine. Default held in metal mask.
0 = VRTC is not driven out on SWVRTC pin
1 = VRTC is driven out on SWVRTC pin
Reset by state machine.
AUXADC control
0 = disabled
1 = enabled
Reset by state machine.
Digital comparator 4 enable
0 = disabled
1 = enabled
Reset by state machine.
Digital comparator 3 enable
0 = disabled
1 = enabled
Reset by state machine.
Digital comparator 2 enable
0 = disabled
1 = enabled
Reset by state machine.
Digital comparator 1 enable
0 = disabled
1 = enabled
Reset by state machine.
DESCRIPTION
DESCRIPTION
PD, March 2010, Rev 4.2
REFER TO
REFER TO
WM8352
227
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