WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 113

Audio CODECs Audio CODEC plus pwr management

WM8352GEB/V

Manufacturer Part Number
WM8352GEB/V
Description
Audio CODECs Audio CODEC plus pwr management
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8352GEB/V

Number Of Adc Inputs
2
Number Of Dac Outputs
2
Conversion Rate
48 KSPS
Interface Type
Serial (2-Wire, 3-Wire, 4-Wire)
Resolution
12 bit
Operating Supply Voltage
3.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
BGA
Minimum Operating Temperature
- 25 C
Number Of Channels
2 ADC/2 DAC
Supply Current
260 uA
Thd Plus Noise
- 83 dB
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
8
No. Of Output Channels
6
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
95dB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Production Data
w
Table 61 Control Interface Switching in Development Mode
14.4.2
In Development mode, the GPIO1 pin is configured as a DO_CONF output (see Section 20), which is
asserted high to indicate that the WM8352 is about to start up. This may be used to trigger the
‘genie’ to configure the WM8352 via the secondary control interface.
Figure 65 Configuration Timing in Development Mode
On completion of the register configuration, the power-up sequence is initiated by writing a logic 1 to
the CONFIG_DONE bit. If the CONFIG_DONE bit is not set before the maximum set-up time has
elapsed (see Figure 65), then the WM8352 will revert to the OFF state.
An alternative implementation is to start up the WM8352 by setting CONFIG_DONE to ‘1’ without
first programming the converter/LDO settings. By this method, the rising edge of the /RST signal may
be used to trigger the WM8352 configuration process after the device has entered the ACTIVE state.
In this case, the DC-DC converters and LDOs turn on immediately when they are enabled (time slots
are no longer relevant because the WM8352 is already in the ACTIVE state). To reduce in-rush
current, any configuration sequence triggered by /RST should therefore include supply staggering in
software (i.e. time delays between powering up individual supply domains).
Note that, whether using DO_CONF or /RST to trigger configuration, the on-chip watchdog imposes
a time-out for configuration; if the WM8352 watchdog is not serviced, it restarts the system. This can
be prevented, if necessary, by disabling the watchdog.
R6 (06h)
Interface
Control
Note: In custom modes (CONF[1:0]≠00), the secondary control interface is never used and the
control bits described here have no effect.
ADDRESS
STARTING UP IN DEVELOPMENT MODE
14:13
BIT
15
USE_DEV_P
INS
DEV_ADDR
[1:0]
LABEL
DEFAULT
00
1
Selects which pins to use for the 2-wire
control:
0 = Use 2-wire I/F pins as 2-wire interface
1 = Use GPIO 10 and 11 as 2-wire interface,
e.g. to download settings from PIC.
Only applies when CONFIG pins[1:0] = 00.
Selects device address (only valid when
CONF_STS = 00)
00 = 0x34
01 = 0x36
10 = 0x3C
11 = 0x3E
DESCRIPTION
PD, March 2010, Rev 4.2
WM8352
113

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