TDA5251 Infineon Technologies, TDA5251 Datasheet - Page 64

TXRX FSK/ASK SGL LP TSSOP-38

TDA5251

Manufacturer Part Number
TDA5251
Description
TXRX FSK/ASK SGL LP TSSOP-38
Manufacturer
Infineon Technologies
Type
Transceiverr
Datasheets

Specifications of TDA5251

Package / Case
38-TSSOP
Frequency
315MHz
Data Rate - Maximum
64kbps
Modulation Or Protocol
ASK, FSK
Applications
RKE, Remote Control Systems
Power - Output
13dBm
Sensitivity
-109dBm
Voltage - Supply
2.1 V ~ 5.5 V
Current - Receiving
9.3mA
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Operating Frequency
0.35 MHz
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
SP000014554
TDA5251
TDA5251INTR
TDA5251XT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA5251
Manufacturer:
INFINEON
Quantity:
276
Component calculation: (rule of thumb)
3.6.3
The TDA5251 data output can be digital (pin 28) or in analog form by using the peak detector output
and changing some settings.
To get an analog data output the slicer must be set to lowpass mode (Reg. 0, D15 = LP = 0) and
the peak detector capacitor at pin 12 or 13 has to be changed to a resistor of about 47kOhm.
Figure 3-26
3.6.4
For a safe and fast threshold value generation the peak detector is turned on by the sequencer
circuit (see Section 2.4.18) only after the entire receiving path is active.
In the off state the output of the positive peak detector is tied down to GND and the output of the
negative peak detector is pulled up to VCC.
Data Sheet
C
C
P
n
2
100
100
2
*
*
T
T
k
k
L
L
Peak Detector - Analog output signal
Peak Detector – Power Down Mode
1
2
Peak Detector as analog Buffer (v=1)
T
L1
T
L2
– longest period of no signal change (LOW signal)
– longest period of no signal change (HIGH signal)
64
TDA5251 F1
Version 1.1
Application
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2007-02-26
PkD_analog.wmf

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