TDA5251 Infineon Technologies, TDA5251 Datasheet - Page 22

TXRX FSK/ASK SGL LP TSSOP-38

TDA5251

Manufacturer Part Number
TDA5251
Description
TXRX FSK/ASK SGL LP TSSOP-38
Manufacturer
Infineon Technologies
Type
Transceiverr
Datasheets

Specifications of TDA5251

Package / Case
38-TSSOP
Frequency
315MHz
Data Rate - Maximum
64kbps
Modulation Or Protocol
ASK, FSK
Applications
RKE, Remote Control Systems
Power - Output
13dBm
Sensitivity
-109dBm
Voltage - Supply
2.1 V ~ 5.5 V
Current - Receiving
9.3mA
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Operating Frequency
0.35 MHz
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
SP000014554
TDA5251
TDA5251INTR
TDA5251XT

Available stocks

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Manufacturer
Quantity
Price
Part Number:
TDA5251
Manufacturer:
INFINEON
Quantity:
276
2.4.13
A Bandgap Reference Circuit provides a temperature stable 1.2V reference voltage for the device.
A power down mode is available to switch off all subcircuits that are controlled by the bidirectional
Powerdown&DataDetect PwdDD pin (pin 27) as shown in the following table. Power down mode
can either be activated by pin 27 or bit D14 in Register 00h. In power down mode also pin 28 (DATA)
is affected (see Section 2.4.17).
Table 2-5
2.4.14
The timing and data control unit contains a wake-up logic unit, an I
interface, a “data valid” detection unit and a set of configuration registers as shown in the
subsequent figure.
Figure 2-6
Data Sheet
Bandgap Reference Circuitry and Powerdown
Timing and Data Control Unit
PwdDD Pin Operating States
Timing and Data Control Unit
Ground/VSS
PwdDD
VDD
RSSI
BLOCK ENABLE
RX DATA
FSK DATA
ASK DATA
ASK / FSK
RX / TX
ADC
6 Bit
INTERNAL BUS
DATA VALID
INTERFACE
DETECTOR
TH1<T
I
threshold TH3
FREQUENCY
2
AMPLITUDE
C / 3Wire
window
GATE
SEQUENCER
POWER ON
22
CONTROL
<TH2
LOGIC
Powerdown Mode
Operating State
Device On
13.125 MHz
XTAL-Osz.
WAKEUP
RC-Osz.
LOGIC
32kHz
CLKDiv
PwdDD
Data
AskFsk
RxTx
Reset
Functional Description
2
C/3-wire microcontroller
TDA5251 F1
Version 1.1
2007-02-26
logic.wmf

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