TDA5251 Infineon Technologies, TDA5251 Datasheet - Page 33
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TDA5251
Manufacturer Part Number
TDA5251
Description
TXRX FSK/ASK SGL LP TSSOP-38
Manufacturer
Infineon Technologies
Type
Transceiverr
Specifications of TDA5251
Package / Case
38-TSSOP
Frequency
315MHz
Data Rate - Maximum
64kbps
Modulation Or Protocol
ASK, FSK
Applications
RKE, Remote Control Systems
Power - Output
13dBm
Sensitivity
-109dBm
Voltage - Supply
2.1 V ~ 5.5 V
Current - Receiving
9.3mA
Current - Transmitting
14mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Operating Frequency
0.35 MHz
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
SP000014554
TDA5251
TDA5251INTR
TDA5251XT
TDA5251
TDA5251INTR
TDA5251XT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TDA5251
Manufacturer:
INFINEON
Quantity:
276
With default settings the clock generating units are disabled during PD, therefore no clock is
available at the clock output pin. It is possible to offer a clock signal at the clock output pin every
time (also during PD) if the CLK_EN Bit in the CONFIG register is set to HIGH.
Figure 2-15
Note: The time values are typical values
Figure 2-16
*
Note: The time values are typical values
Data Sheet
State is either „I“ or „O“ depending on time of setting into powerdown
DC OFFSET COMPENSATION
DC OFFSET COMPENSATION
PEAK DETECTOR EN
DATADETECTION EN
PEAK DETECTOR EN
DATADETECTION EN
POWER AMP EN
POWER AMP EN
XTAL EN
STATUS
XTAL EN
STATUS
0.5ms
0.5ms
t
t
CLKSU
CLKSU
1
1st start or reset in PD mode
st
start or reset in active mode
RESET
or 1
PWDDD = low
RESET
or 1
PWDDD = high
TX activ or RX activ
st
st
POWER ON
POWER ON
CLOCK FOR EXTERNAL µP
CLOCK FOR EXTERNAL µP
t
SYSSU
8ms
1.1ms
t
TXSU
PD
if RX
if RX
if RX
if TX
t
2.2ms
t
2.6ms
RXSU
DDSU
PWDDD = low
t
0.5ms
33
CLKSU
PD
*
TX activ or RX activ
t
SYSSU
8ms
1.1ms
t
TXSU
TX activ
t
1.1ms
TXSU
if RX
t
0.5ms
CLKSU
PD
*
if RX
if RX
if TX
t
2.2ms
t
2.6ms
RXSU
DDSU
RX activ
0.5ms
t
Functional Description
CLKSU
PD
*
t
2.2ms
t
2.6ms
RXSU
DDSU
TX activ
Sequenzer_Timing_pupstart.wmf
TX activ
t
1.1ms
Sequenzer_Timing_pdstart.wmf
TXSU
t
1.1ms
TXSU
TDA5251 F1
Version 1.1
RX activ
RX activ
2007-02-26
t
2.2ms
t
2.6ms
t
2.2ms
t
2.6ms
RXSU
DDSU
RXSU
DDSU