MRF24J40-I/ML Microchip Technology, MRF24J40-I/ML Datasheet - Page 67

• Manufacturer Part Number: MRF24J40-I/ML
• Description: IC TXRX IEEE/ZIGBEE 2.4GHZ 40QFN
• Manufacturer: Microchip Technology

Specifications of MRF24J40-I/ML

• Package / Case: 40-QFN
• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4
• Applications: ISM, ZigBee™
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.4 V ~ 3.6 V
• Current - Receiving: 18mA
• Current - Transmitting: 18mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 2.4 GHz
• Interface Type: 4 Wire SPI
• Noise Figure: 8 dB
• Output Power: + 0 dBm
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 22 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 2-67:
REGISTER 2-68:
© 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
SLPCAL15
SLPCAL7
R-0
R-0
SLPCAL<15:8>: Sleep Calibration Counter bits
20-bit counter to calibrate the Sleep Clock (SLPCLK) period. The counter contains the count of
16 SLPCLK periods. The SLPCLK period depends on the Sleep Clock Selection (SLPCLKSEL),
RFCON7<7:6> and Sleep Clock Divisor (SLPCLKDIV) SLPCON1<4:0> bits. Units: tick (50 ns).
SLPCAL<7:0>: Sleep Calibration Counter bits
20-bit counter to calibrate the Sleep Clock (SLPCLK) period. The counter contains the count of
16 SLPCLK periods. The SLPCLK period depends on the Sleep Clock Selection (SLPCLKSEL),
RFCON7<7:6> and Sleep Clock Divisor (SLPCLKDIV) SLPCON1<4:0> bits. Units: tick (50 ns).
SLPCAL14
SLPCAL6
R-0
R-0
SLPCAL0: SLEEP CALIBRATION 0 REGISTER (ADDRESS: 0x209)
SLPCAL1: SLEEP CALIBRATION 1 REGISTER (ADDRESS: 0x20A)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
SLPCAL13
SLPCAL5
R-0
R-0
SLPCAL12
SLPCAL4
R-0
R-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SLPCAL3
SLPCAL11
R-0
R-0
SLPCAL2
SLPCAL10
R-0
R-0
x = Bit is unknown
x = Bit is unknown
MRF24J40
SLPCAL1
SLPCAL9
R-0
R-0
DS39776C-page 67
SLPCAL0
SLPCAL8
R-0
R-0
bit 0
bit 0