MRF89XA-I/MQ Microchip Technology, MRF89XA-I/MQ Datasheet - Page 91

• Manufacturer Part Number: MRF89XA-I/MQ
• Description: TXRX ISM SUB-GHZ ULP 32QFN
• Manufacturer: Microchip Technology

Specifications of MRF89XA-I/MQ

• Package / Case: 32-WFQFN Exposed Pad
• Frequency: 863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: FSK, OOK
• Applications: ISM
• Power - Output: 12.5dBm
• Sensitivity: -113dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 863 MHz to 870 MHz, 902 MHz to 928 MHz, 950 MHz to 960 MHz
• Interface Type: SPI
• Noise Figure: - 112 dBc
• Output Power: - 8.5 dBm, + 12.5 dBm
• Operating Supply Voltage: 2.1 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Data Rate: 256 Kbps
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 3-31:
3.11.5
Table 3-11 and Table 3-12 provides the descriptions of
the interrupts available in Packet mode.
TABLE 3-11:
TABLE 3-12:
© 2010 Microchip Technology Inc.
IRQ0RXS<1:0>
00 (default)
01
10
11
IRQ1RXS<1:0>
00 (default)
01
10
11
Note 1:
IRQ0TXST
0 (default)
1
IRQ1TX
0 (default)
1
Note: Also refer the DMODE1 and DMODE0 bits in the FTXRXIREG and FTPRIREG registers for details.
Interrupt Name
Interrupt Name
2:
X 8
Address Match valid only if Address Filtering is Enabled.
Also refer the DMODE1 and DMODE0 bits in the FTXRXIREG and FTPRIREG registers for details.
INTERRUPT SIGNAL MAPPING
INTERRUPT MAPPING IN RX AND STAND-BY IN PACKET MODE
INTERRUPT MAPPING IN TX PACKET MODE
X 7
DATA WHITENING
Interrupts
IRQ0
IRQ0
IRQ0
IRQ0
IRQ1
IRQ1
IRQ1
IRQ1
Interrupts
X 6
IRQ0
IRQ0
IRQ1
IRQ1
Data Mode
X 5
Packet
Packet
Packet
Packet
Packet
Packet
Packet
Packet
LFSR Polynomial = x
Preliminary
Data Mode
Packet
Packet
Packet
Packet
Interrupt Type
X 4
Transmit data
Output
Output
Output
Output
Output
Output
Output
Output
9
+ x
5
+ 1
X 3
Interrupt Type
FIFO_THRESHOLD FIFO_THRESHOLD
Sync/Address
Output
Output
Output
Output
RX Interrupt
WRITEBYTE
FIFOEMPTY
FIFOFULL
PLREADY
Match
CRCOK
Source
X 2
RSSI
(2)
MRF89XA
X 1
FIFO_THRESHOLD
Whitened data
Interrupt Source
Stand-by Interrupt
FIFOEMPTY
DS70622B-page 91
FIFOFULL
FIFOEMPTY
TXDONE
FIFOFULL
Source
X 0
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