ATA5773-DK1 Atmel, ATA5773-DK1 Datasheet - Page 70

• Manufacturer Part Number: ATA5773-DK1
• Description: BOARD XMITTER FOR ATA5773 315MHZ
• Manufacturer: Atmel
• Type: Transmitterr

Specifications of ATA5773-DK1

• Frequency: 315MHz
• Maximum Frequency: 315 MHz
• Supply Voltage (max): 4 V
• Supply Voltage (min): 2 V
• Supply Current: 9 mA
• Product: RF Development Tools
• For Use With/related Products: ATA5773
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

70
Atmel ATA5771/73/74
• Port A, Bit 6 – ADC6/DI/SDA/OC1A/PCINT6
ADC6: Analog to Digital Converter, Channel 6
SDA: Two-wire mode Serial Interface Data.
DI: Data Input in USI Three-wire mode. USI Three-wire mode does not override normal port
functions, so pin must be configure as an input for DI function.
OC1A, Output Compare Match output: The PA6 pin can serve as an external output for the
Timer/Counter1 Compare Match A. The PA6 pin has to be configured as an output (DDA6 set
(one)) to serve this function. The OC1A pin is also the output pin for the PWM mode timer
function.
PCINT6: Pin Change Interrupt source 6. The PA6 pin can serve as an external interrupt
source for pin change interrupt 0.
• Port A, Bit 7 – ADC7/OC0B/ICP1/PCINT7
ADC7: Analog to Digital Converter, Channel 7
OC1B, Output Compare Match output: The PA7 pin can serve as an external output for the
Timer/Counter1 Compare Match B. The PA7 pin has to be configured as an output (DDA7 set
(one)) to serve this function. The OC1B pin is also the output pin for the PWM mode timer
function.
ICP1, Input Capture Pin: The PA7 pin can act as an Input Capture Pin for Timer/Counter1.
PCINT7: Pin Change Interrupt source 7. The PA7 pin can serve as an external interrupt
source for pin change interrupt 0.
Table 4-24
signals shown in
Table 4-24.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
PA7/ADC7/OC0B/ICP1/
PCINT7
0
0
0
0
OC0B enable
OC0B
0
PCINT7 • PCIE0 + ADC7D
PCINT7/ICP1 Input
ADC7 Input
to
PCINT7 • PCIE0
Table 4-26 on page 71
Overriding Signals for Alternate Functions in PA7..PA5
Table 4-25 on page
71.
relate the alternate functions of Port A to the overriding
PA6/ADC6/DI/SDA/OC1A/
PCINT6
0
0
USIWM1
(SDA + PORTA6) • DDRA6
(USIWM1 • DDA6) + OC1A
enable
( USIWM1• DDA6) • OC1A
0
USISIE + (PCINT6 • PCIE0)
+ ADC6D
USISIE + PCINT7 • PCIE0
DI/SDA/PCINT6 Input
ADC6 Input
.
.
PA5/ADC5/DO/OC1B/
PCINT5
0
0
0
0
(USIWM1 • USIWM0) +
OC1B enable
USIWM1 • USIWM0 • DO +
(~USIWM1 • USIWM0) •
OC1B}
0
PCINT5 • PCIE + ADC5D
PCINT5 • PCIE
PCINT5 Input
ADC5 Input
9137E–RKE–12/10