ATA5773-DK1 Atmel, ATA5773-DK1 Datasheet - Page 57

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ATA5773-DK1

Manufacturer Part Number
ATA5773-DK1
Description
BOARD XMITTER FOR ATA5773 315MHZ
Manufacturer
Atmel
Type
Transmitterr
Datasheets

Specifications of ATA5773-DK1

Frequency
315MHz
Maximum Frequency
315 MHz
Supply Voltage (max)
4 V
Supply Voltage (min)
2 V
Supply Current
9 mA
Product
RF Development Tools
For Use With/related Products
ATA5773
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.13
4.13.1
9137E–RKE–12/10
External Interrupts
Pin Change Interrupt Timing
The External Interrupts are triggered by the INT0 pin or any of the PCINT11..0 pins. Observe
that, if enabled, the interrupts will trigger even if the INT0 or PCINT11..0 pins are configured as
outputs. This feature provides a way of generating a software interrupt. Pin change 0 inter-
rupts PCI0 will trigger if any enabled PCINT7..0 pin toggles. Pin change 1 interrupts PCI1 will
trigger if any enabled PCINT11..8 pin toggles. The PCMSK0 and PCMSK1 Registers control
which pins contribute to the pin change interrupts. Pin change interrupts on PCINT11..0 are
detected asynchronously. This implies that these interrupts can be used for waking the part
also from sleep modes other than Idle mode.
The INT0 interrupts can be triggered by a falling or rising edge or a low level. This is set up as
indicated in the specification for the MCU Control Register – MCUCR. When the INT0 interrupt
is enabled and is configured as level triggered, the interrupt will trigger as long as the pin is
held low. Note that recognition of falling or rising edge interrupts on INT0 requires the pres-
ence of an I/O clock, described in
32. Low level interrupt on INT0 is detected asynchronously. This implies that this interrupt can
be used for waking the part also from sleep modes other than Idle mode. The I/O clock is
halted in all sleep modes except Idle mode.
Note that if a level triggered interrupt is used for wake-up from Power-down, the required level
must be held long enough for the MCU to complete the wake-up to trigger the level interrupt. If
the level disappears before the end of the Start-up Time, the MCU will still wake up, but no
interrupt will be generated. The start-up time is defined by the SUT and CKSEL Fuses as
described in
An example of timing of a pin change interrupt is shown in
Figure 4-20. Timing of pin change interrupts
Section 4.9 “System Clock and Clock Options” on page
pcint_setflag
pcint_in_(0)
PCINT(0)
pcint_syn
pin_sync
pin_lat
PCINT(0)
PCIF
clk
clk
LE
pin_lat
D
Section 4.9.1 “Clock Systems and their Distribution” on page
Q
pin_sync
PCINT(0) in PCMSK(x)
pcint_in_(0)
0
x
Atmel ATA5771/73/74
clk
Figure
pcint_syn
4-20.
32.
pcint_setflag
PCIF
57

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