SAK-TC1796-256F150E BC Infineon Technologies, SAK-TC1796-256F150E BC Datasheet - Page 22

• Manufacturer Part Number: SAK-TC1796-256F150E BC
• Description: IC MCU 32BIT FLASH BGA-416
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1796-256F150E BC

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 123
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 44x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Data Bus Width: 32 bit
• Data Ram Size: 256 KB
• Interface Type: 2xASC, 2xSSC, 2xMSC, 2xMLI
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 123
• Number Of Timers: 260
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 10 bit, 12 bit, 44 Channel
• Packages: P-BGA-416
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 256.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 44
• Program Memory: 2.0 MB
• For Use With: B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No
• Other names: SAKTC1796256F150EBCT; SP000097527; SP000097528

Table 2
Symbol
P5
P5.0
P5.1
P5.2
P5.3
P5.4
P5.5
P5.6
P5.7
Data Sheet
Pins
B13
A13
A14
B14
C15
C14
B15
A15
Pin Definitions and Functions (cont’d)
I/O Pad
I/O A2
I/O
O
I/O
O
O
O
I
O
O
I
Class
Power
Supply
V
DDP
22
Functions
Port 5
Port 5 is an 8-bit bi-directional general-
purpose I/O port which can be alternatively
used for ASC0/1 or MSC0/1 lines.
RXD0A
TXD0A
RXD1A
TXD1A
EN00
RREADY0B
SDI0
EN10
TVALID0B
SDI1
General Device Information
ASC0 receiver input /
output A
ASC0 transmitter output A
ASC1 receiver input /
output A
ASC1 transmitter output A
P5.3 is latched with the
rising edge of PORST if
BYPASS = 1 and stored in
inverted state as bit
OSC_CON.MOSC.
MSC0 device select
output 0
MLI0 receive channel ready
output B
MSC0 serial data input
MSC1 device select
output 0
MLI0 transmit channel valid
output B
MSC1 serial data input
V1.0, 2008-04
TC1796