SAK-TC1796-256F150E BC Infineon Technologies, SAK-TC1796-256F150E BC Datasheet - Page 109

• Manufacturer Part Number: SAK-TC1796-256F150E BC
• Description: IC MCU 32BIT FLASH BGA-416
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1796-256F150E BC

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 123
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 44x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Data Bus Width: 32 bit
• Data Ram Size: 256 KB
• Interface Type: 2xASC, 2xSSC, 2xMSC, 2xMLI
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 123
• Number Of Timers: 260
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 10 bit, 12 bit, 44 Channel
• Packages: P-BGA-416
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 256.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 44
• Program Memory: 2.0 MB
• For Use With: B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No
• Other names: SAKTC1796256F150EBCT; SP000097527; SP000097528

4.3.4
Table 23
Parameter
Min.
defined pad states
Oscillator start-up time
Minimum PORST active time
after power supplies are stable
at operating levels
HDRST pulse width
PORST rise time
Setup time to PORST rising
edge
Hold time from PORST rising
edge
Setup time to HDRST rising
edge
Hold time from HDRST rising
edge
Ports inactive after PORST
reset active
Ports inactive after HDRST
reset active
Minimum
activation threshold
Minimum
activation threshold
Power on Reset Boot Time
Hardware/Software Reset
Boot Time at
Data Sheet
V
4)
4)
5)
5)
DDP
V
V
voltage to ensure
DDP
DD
Power, Pad and Reset Timing
7)8)
f
PORST
CPU
Power, Pad and Reset Timing Parameters
PORST
=150MHz
1)
9)
9)
2)
9)
10)
Symbol
V
t
t
t
t
t
t
t
t
t
t
V
V
t
t
OSCS
POA
HD
POR
POS
POH
HDS
HDH
PIP
PI
BP
B
DDPPA
PORST3.3
PORST1.5
CC –
CC –
CC 1024
CC 150
CC 0.6
CC –
CC –
SR
SR
SR 10
SR –
SR 0
SR 100
SR 0
SR 100 +
109
Min.
clock
cycles
(2 × 1/
f
–
–
SYS
)
6)
3)6)
Values
Typ. Max.
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
10
–
–
50
–
–
–
–
150
150 +
5 × 1/
f
2.9
1.32
2
350
SYS
Electrical Parameters
Unit Note /
V
ms
ms
f
ms
ns
ns
ns
ns
ns
ns
V
V
ms
µs
SYS
V1.0, 2008-04
Test Con
dition
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
TC1796