SAK-TC1796-256F150E BC Infineon Technologies, SAK-TC1796-256F150E BC Datasheet - Page 119

• Manufacturer Part Number: SAK-TC1796-256F150E BC
• Description: IC MCU 32BIT FLASH BGA-416
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1796-256F150E BC

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 123
• Program Memory Size: 2MB (2M x 8)
• Program Memory Type: FLASH
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 44x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Data Bus Width: 32 bit
• Data Ram Size: 256 KB
• Interface Type: 2xASC, 2xSSC, 2xMSC, 2xMLI
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 123
• Number Of Timers: 260
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 10 bit, 12 bit, 44 Channel
• Packages: P-BGA-416
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 256.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 44
• Program Memory: 2.0 MB
• For Use With: B158-H8537-G2-X-7600IN - KIT STARTER TC179X FAMILY
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No
• Other names: SAKTC1796256F150EBCT; SP000097527; SP000097528

Table 28
Parameter
TMS setup to TCK rising edge
TMS hold to TCK rising edge
TDI setup to TCK rising edge
TDI hold to TCK rising edge
TDO valid output from TCK
falling edge
TDO high impedance to valid
output from TCK falling edge
TDO valid output to high
impedance from TCK falling
edge
1)
2) The falling edge on TCK is used to capture the TDO timing.
Figure 37
Note: The JTAG module is fully compliant with IEEE1149.1-2000 with JTAG clock at
Data Sheet
f
TCK
2)
should be lower or equal to
20 MHz. The JTAG clock at 40MHz is possible with the modified timing diagram
shown in
2)
JTAG Timing Parameters
JTAG Timing
TMS
TDO
TCK
TDI
Figure
37.
f
SYS
2)
.
Symbol
t
t
t
t
t
t
t
t
t
t
1
2
1
2
3
3
4
5
1
1
t
4
SR 6.0
SR 6.0
SR 6.0
SR 6.0
CC –
CC 3.0
CC –
CC –
t
t
2
2
1)
119
Min.
t
3
Values
Typ.
–
–
–
–
–
–
–
–
Max.
–
–
–
–
13
–
14
13.5
t
5
Electrical Parameters
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Jtag
V1.0, 2008-04
Note /
Test Con
dition
–
–
–
–
C
C
C
C
L
L
L
L
TC1796
= 50 pF
= 20 pF
= 50 pF
= 50 pF