MCHC908GR8AVFAE Freescale Semiconductor, MCHC908GR8AVFAE Datasheet - Page 27

• Manufacturer Part Number: MCHC908GR8AVFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AVFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Chapter 2
Memory
2.1 Introduction
The CPU08 can address 64 Kbytes of memory space. The memory map, shown in
2.2 Unimplemented Memory Locations
Accessing an unimplemented location can cause an illegal address reset. In the memory map
and in register figures in this document, unimplemented locations are shaded.
2.3 Reserved Memory Locations
Accessing a reserved location can have unpredictable effects on microcontroller (MCU) operation. In the
Figure 2-1
or with the letter R.
2.4 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page area of $0000–$003F. Additional I/O
registers have these addresses:
Data registers are shown in
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7680 bytes of user FLASH memory on the MC68HC908GR8A or 4096 bytes of user FLASH
memory on the MC68HC908GR4A
384 bytes of random-access memory (RAM)
544 bytes of FLASH burn-in routines in ROM
36 bytes of user-defined vectors
310 bytes of monitor ROM
$FE00; break status register, SBSR
$FE01; SIM reset status register, SRSR
$FE02; reserved
$FE03; break flag control register, SBFCR
$FE04; interrupt status register 1, INT1
$FE05; interrupt status register 2, INT2
$FE06; interrupt status register 3, INT3
$FE07; reserved
$FE08; FLASH control register, FLCR
$FE09; break address register high, BRKH
$FE0A; break address register low, BRKL
$FE0B; break status and control register, BRKSCR
$FE0C; LVI status register, LVISR
$FF7E; FLASH block protect register, FLBPR
and in register figures in this document, reserved locations are marked with the word Reserved
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Figure
2-2.
Table 2-1
is a list of vector locations.
Figure
2-1, includes:
(Figure
2-1)
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