MCHC908GR8AVFAE Freescale Semiconductor, MCHC908GR8AVFAE Datasheet - Page 122

• Manufacturer Part Number: MCHC908GR8AVFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AVFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Input/Output (I/O) Ports
12.4 Port C
Port C is a 2-bit, general-purpose bidirectional I/O port. Port C also has software configurable pullup
devices if configured as an input port.
12.4.1 Port C Data Register
The port C data register (PTC) contains a data latch for each of the two port C pins.
PTC1–PTC0 — Port C Data Bits
12.4.2 Data Direction Register C
Data direction register C (DDRC) determines whether each port C pin is an input or an output. Writing a 1
to a DDRC bit enables the output buffer for the corresponding port C pin; a 0 disables the output buffer.
DDRC1–DDRC0 — Data Direction Register C Bits
122
These read/write bits are software-programmable. Data direction of each port C pin is under the control
of the corresponding bit in data direction register C. Reset has no effect on port C data.
These read/write bits control port C data direction. Reset clears DDRC1–DDRC0, configuring all port
C pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
Address:
Address:
PTC is not available in a 28-pin DIP or SOIC package.
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
For those devices packaged in a 28-pin DIP or SOIC package,
PTC1–PTC0 are not connected. Set DDRC1 and DDRC0 to a 1 to
configure PTC1–PTC0 as outputs.
Reset:
Read:
Write:
Reset:
Read:
Write:
$0002
Bit 7
$0006
Bit 7
0
0
0
Figure 12-10. Data Direction Register C (DDRC)
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
= Unimplemented
= Unimplemented
Figure 12-9. Port C Data Register (PTC)
6
0
6
0
0
5
0
5
0
0
NOTE
NOTE
Unaffected by reset
4
0
4
0
0
3
0
3
0
0
2
0
2
0
0
PTC1
DDRC1
1
1
0
Freescale Semiconductor
PTC0
DDRC0
Bit 0
Bit 0
0