MCHC908GR8AVFAE Freescale Semiconductor, MCHC908GR8AVFAE Datasheet - Page 120

• Manufacturer Part Number: MCHC908GR8AVFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AVFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Input/Output (I/O) Ports
12.3 Port B
Port B is a 6-bit special-function port that shares all six of its pins with the analog-to-digital converter
(ADC) module.
12.3.1 Port B Data Register
The port B data register (PTB) contains a data latch for each of the six port pins.
PTB5–PTB0 — Port B Data Bits
AD5–AD0 — Analog-to-Digital Input Bits
12.3.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is an input or an output. Writing a 1
to a DDRB bit enables the output buffer for the corresponding port B pin; a 0 disables the output buffer.
120
These read/write bits are software-programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
AD5–AD0 are pins used for the input channels to the analog-to-digital converter module. The channel
select bits in the ADC status and control register define which port B pin will be used as an ADC input
and overrides any control from the port I/O logic by forcing that pin as the input to the analog circuitry.
Alternative
Function:
Address:
Address:
Care must be taken when reading port B while applying analog voltages to
AD5–AD0 pins. If the appropriate ADC channel is not enabled, excessive
current drain may occur if analog voltages are applied to the PTBx/ADx pin,
while PTB is read as a digital input. Those ports not selected as analog
input channels are considered digital I/O ports.
PTB4 and PTB5 are not available in 28-pin DIP and SOIC packages.
Reset:
Reset:
Read:
Read:
Write:
Write:
$0001
$0005
Bit 7
Bit 7
0
0
0
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
Figure 12-7. Data Direction Register B (DDRB)
= Unimplemented
= Unimplemented
Figure 12-6. Port B Data Register (PTB)
6
0
6
0
0
DDRB5
PTB5
AD5
5
5
0
NOTE
DDRB4
Unaffected by reset
PTB4
AD4
4
4
0
DDRB3
PTB3
AD3
3
3
0
DDRB2
PTB2
AD2
2
2
0
DDRB1
PTB1
AD1
1
1
0
Freescale Semiconductor
DDRB0
PTB0
Bit 0
AD0
Bit 0
0